[PATCH] D152790: [ARM] Fix codegen of unaligned volatile load/store of i64

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

re: allowsUnalignedMem:

Certain memory (e.g. memmap'ed registers, uncached memory) have restrictions that go beyond the normal rules for memory.  allowsUnalignedMem() is supposed to model that: all pointer accesses have to be naturally aligned to avoid faults, even if the CPU supports unaligned access to cached memory.

I'm not 100% sure what the interaction is between that and ldrd/strd off the top of my head.  But the idea would be to narrow the check to `Align(Subtarget->hasV6Ops() && Subtarget->allowsUnalignedMem() ? 4 : 8)`, so we don't emit a ldrd such that "addr % 8 == 4".


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D152790/new/

https://reviews.llvm.org/D152790