[llvm] f9f8517 - [InstCombine][AArch64] Fix phi insertion point

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 16 05:59:27 PDT 2023


Author: Nikita Popov
Date: 2023-06-16T14:58:33+02:00
New Revision: f9f8517e03f5304d7132cf514c9d13c7d0c0fe1b

URL: https://github.com/llvm/llvm-project/commit/f9f8517e03f5304d7132cf514c9d13c7d0c0fe1b
DIFF: https://github.com/llvm/llvm-project/commit/f9f8517e03f5304d7132cf514c9d13c7d0c0fe1b.diff

LOG: [InstCombine][AArch64] Fix phi insertion point

Fix the issue reported at https://reviews.llvm.org/rG724f4a5bac25#inline-9083,
by specifying the correct insertion point for the new phi.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index b7dd95dd69308..2a66eab73ab7f 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -662,6 +662,7 @@ static std::optional<Instruction *> processPhiNode(InstCombiner &IC,
   }
 
   // Create the new Phi
+  IC.Builder.SetInsertPoint(PN);
   PHINode *NPN = IC.Builder.CreatePHI(RequiredType, PN->getNumIncomingValues());
   Worklist.push_back(PN);
 

diff  --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll
index 868a5d7971d75..cf2040650f84a 100644
--- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll
+++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-reinterpret.ll
@@ -326,6 +326,34 @@ join:
   ret <vscale x 16 x i1> %pg
 }
 
+define void @phi_insert_point(<vscale x 4 x i1> %arg, ptr %p) {
+; CHECK-LABEL: define void @phi_insert_point
+; CHECK-SAME: (<vscale x 4 x i1> [[ARG:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
+; CHECK:       for.body:
+; CHECK-NEXT:    [[CONVERT:%.*]] = phi <vscale x 4 x i1> [ [[ARG]], [[ENTRY:%.*]] ], [ zeroinitializer, [[FOR_BODY]] ]
+; CHECK-NEXT:    [[IDX:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IDX_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[IDX_EXT:%.*]] = ashr i64 [[IDX]], 1
+; CHECK-NEXT:    store <vscale x 4 x i1> [[CONVERT]], ptr [[P]], align 1
+; CHECK-NEXT:    [[IDX_NEXT]] = or i64 [[IDX_EXT]], 1
+; CHECK-NEXT:    br label [[FOR_BODY]]
+;
+entry:
+  %init = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %arg)
+  br label %for.body
+
+for.body:
+  %phi = phi <vscale x 16 x i1> [ %init, %entry ], [ %phi.next, %for.body ]
+  %idx = phi i64 [ 0, %entry ], [ %idx.next, %for.body ]
+  %idx.ext = ashr i64 %idx, 1
+  %convert = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %phi)
+  store <vscale x 4 x i1> %convert, ptr %p
+  %idx.next = or i64 %idx.ext, 1
+  %phi.next = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> zeroinitializer)
+  br label %for.body
+}
+
 declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1>)
 declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1>)
 declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1>)


        


More information about the llvm-commits mailing list