[llvm] 1baa5b8 - [GlobalIsel][X86] Move G_SITOFP/G_FPTOSI getActionDefinitionsBuilder out of setLegalizerInfo64bit and add basic 32-bit support
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 12 07:27:48 PDT 2023
Author: Simon Pilgrim
Date: 2023-06-12T15:26:12+01:00
New Revision: 1baa5b8050c20d80b5310b361a932836a58f6ff8
URL: https://github.com/llvm/llvm-project/commit/1baa5b8050c20d80b5310b361a932836a58f6ff8
DIFF: https://github.com/llvm/llvm-project/commit/1baa5b8050c20d80b5310b361a932836a58f6ff8.diff
LOG: [GlobalIsel][X86] Move G_SITOFP/G_FPTOSI getActionDefinitionsBuilder out of setLegalizerInfo64bit and add basic 32-bit support
We were using x86_64-only support as a SSE2 proxy - vector support is still missing.
Added:
Modified:
llvm/lib/Target/X86/X86LegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
index 70e7c78cdf3db..a34240e18123a 100644
--- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -329,14 +329,13 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.clampScalar(1, s32, HasSSE2 ? s64 : s32)
.widenScalarToNextPow2(1);
- // fp extension
+ // fp conversions
getActionDefinitionsBuilder(G_FPEXT).legalIf([=](const LegalityQuery &Query) {
return (HasSSE2 && typePairInSet(0, 1, {{s64, s32}})(Query)) ||
(HasAVX && typePairInSet(0, 1, {{v4s64, v4s32}})(Query)) ||
(HasAVX512 && typePairInSet(0, 1, {{v8s64, v8s32}})(Query));
});
- // fp truncation
getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
[=](const LegalityQuery &Query) {
return (HasSSE2 && typePairInSet(0, 1, {{s32, s64}})(Query)) ||
@@ -344,6 +343,34 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(HasAVX512 && typePairInSet(0, 1, {{v8s32, v8s64}})(Query));
});
+ getActionDefinitionsBuilder(G_SITOFP)
+ .legalIf([=](const LegalityQuery &Query) {
+ return (HasSSE1 &&
+ (typePairInSet(0, 1, {{s32, s32}})(Query) ||
+ (Is64Bit && typePairInSet(0, 1, {{s32, s64}})(Query)))) ||
+ (HasSSE2 &&
+ (typePairInSet(0, 1, {{s64, s32}})(Query) ||
+ (Is64Bit && typePairInSet(0, 1, {{s64, s64}})(Query))));
+ })
+ .clampScalar(1, s32, sMaxScalar)
+ .widenScalarToNextPow2(1)
+ .clampScalar(0, s32, HasSSE2 ? s64 : s32)
+ .widenScalarToNextPow2(0);
+
+ getActionDefinitionsBuilder(G_FPTOSI)
+ .legalIf([=](const LegalityQuery &Query) {
+ return (HasSSE1 &&
+ (typePairInSet(0, 1, {{s32, s32}})(Query) ||
+ (Is64Bit && typePairInSet(0, 1, {{s64, s32}})(Query)))) ||
+ (HasSSE2 &&
+ (typePairInSet(0, 1, {{s32, s64}})(Query) ||
+ (Is64Bit && typePairInSet(0, 1, {{s64, s64}})(Query))));
+ })
+ .clampScalar(1, s32, HasSSE2 ? s64 : s32)
+ .widenScalarToNextPow2(0)
+ .clampScalar(0, s32, sMaxScalar)
+ .widenScalarToNextPow2(1);
+
// todo: vectors and address spaces
getActionDefinitionsBuilder(G_SELECT)
.legalFor({{s8, s32}, {s16, s32}, {s32, s32}, {s64, s32},
@@ -451,20 +478,6 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
for (unsigned MemOp : {G_LOAD, G_STORE})
LegacyInfo.setAction({MemOp, s64}, LegacyLegalizeActions::Legal);
- getActionDefinitionsBuilder(G_SITOFP)
- .legalForCartesianProduct({s32, s64})
- .clampScalar(1, s32, s64)
- .widenScalarToNextPow2(1)
- .clampScalar(0, s32, s64)
- .widenScalarToNextPow2(0);
-
- getActionDefinitionsBuilder(G_FPTOSI)
- .legalForCartesianProduct({s32, s64})
- .clampScalar(1, s32, s64)
- .widenScalarToNextPow2(0)
- .clampScalar(0, s32, s64)
- .widenScalarToNextPow2(1);
-
// Merge/Unmerge
LegacyInfo.setAction({G_MERGE_VALUES, s128}, LegacyLegalizeActions::Legal);
LegacyInfo.setAction({G_UNMERGE_VALUES, 1, s128},
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