[PATCH] D153049: [AArch64] Try to convert vector shift operation into vector add operation

[JinGu Kang via Phabricator via llvm-commits]

jaykang10 updated this revision to Diff 532072.
jaykang10 added a comment.

Added sshll/ushll test cases which should not be affected by this patch.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153049/new/

https://reviews.llvm.org/D153049

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll
  llvm/test/CodeGen/AArch64/arm64-vshift.ll
  llvm/test/CodeGen/AArch64/rax1.ll
  llvm/test/CodeGen/AArch64/shl-to-add.ll
  llvm/test/CodeGen/AArch64/urem-seteq-illegal-types.ll
  llvm/test/CodeGen/AArch64/vector_splat-const-shift-of-constmasked.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D153049.532072.patch
Type: text/x-patch
Size: 15275 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230616/dd22b3a1/attachment.bin>