[PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions

Nitin John Raj via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 13 13:01:08 PDT 2023


nitinjohnraj added a comment.

In D152726#4414434 <https://reviews.llvm.org/D152726#4414434>, @tschuett wrote:

> As long as you are not interested in vectors, I used this pattern:
>
>   getActionDefinitionsBuilder(G_FREEZE)
>       .legalFor({s8, s16, s32, s64, p0})
>       .widenScalarToNextPow2(0, /*Min=*/8)
>       .clampScalar(0, s8, sMaxScalar);
>
> clamp to legal range and widen to next power of two to handle weird cases.

Thank you for the comment, I formatted the code similarly.


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