[llvm] 4c2fc26 - [RISCV] Use parseOptionalToken. NFC

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2023-06-15T11:35:00-07:00
New Revision: 4c2fc26d330ab93b48b2aea601c4e66326ae4fef

URL: https://github.com/llvm/llvm-project/commit/4c2fc26d330ab93b48b2aea601c4e66326ae4fef
DIFF: https://github.com/llvm/llvm-project/commit/4c2fc26d330ab93b48b2aea601c4e66326ae4fef.diff

LOG: [RISCV] Use parseOptionalToken. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index c3b497dea7f47..c4e4279715873 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2133,10 +2133,7 @@ OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {
 
   getLexer().Lex();
 
-  while (getLexer().is(AsmToken::Comma)) {
-    // Consume comma.
-    getLexer().Lex();
-
+  while (parseOptionalToken(AsmToken::Comma)) {
     if (getLexer().isNot(AsmToken::Identifier))
       break;
 
@@ -2394,8 +2391,7 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
   getLexer().Lex();
 
   // parse case like ,s0
-  if (getLexer().is(AsmToken::Comma)) {
-    getLexer().Lex();
+  if (parseOptionalToken(AsmToken::Comma)) {
     if (getLexer().isNot(AsmToken::Identifier)) {
       Error(getLoc(), "invalid register");
       return MatchOperand_ParseFail;
@@ -2414,8 +2410,7 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
   }
 
   // parse case like -s1
-  if (getLexer().is(AsmToken::Minus)) {
-    getLexer().Lex();
+  if (parseOptionalToken(AsmToken::Minus)) {
     StringRef EndName = getLexer().getTok().getIdentifier();
     // FIXME: the register mapping and checks of EABI is wrong
     RegEnd = matchRegisterNameHelper(IsEABI, EndName);
@@ -2433,7 +2428,7 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
 
   if (!IsEABI) {
     // parse extra part like ', x18[-x20]' for XRegList
-    if (getLexer().is(AsmToken::Comma)) {
+    if (parseOptionalToken(AsmToken::Comma)) {
       if (RegEnd != RISCV::X9) {
         Error(
             getLoc(),
@@ -2442,7 +2437,6 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
       }
 
       // parse ', x18' for extra part
-      getLexer().Lex();
       if (getLexer().isNot(AsmToken::Identifier)) {
         Error(getLoc(), "invalid register");
         return MatchOperand_ParseFail;
@@ -2456,8 +2450,7 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
       getLexer().Lex();
 
       // parse '-x20' for extra part
-      if (getLexer().is(AsmToken::Minus)) {
-        getLexer().Lex();
+      if (parseOptionalToken(AsmToken::Minus)) {
         if (getLexer().isNot(AsmToken::Identifier)) {
           Error(getLoc(), "invalid register");
           return MatchOperand_ParseFail;
@@ -2496,8 +2489,7 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
 }
 
 OperandMatchResultTy RISCVAsmParser::parseZcmpSpimm(OperandVector &Operands) {
-  if (getLexer().is(AsmToken::Minus))
-    getLexer().Lex();
+  (void)parseOptionalToken(AsmToken::Minus);
 
   SMLoc S = getLoc();
   int64_t StackAdjustment = getLexer().getTok().getIntVal();
@@ -2574,10 +2566,7 @@ bool RISCVAsmParser::ParseInstruction(ParseInstructionInfo &Info,
     return true;
 
   // Parse until end of statement, consuming commas between operands
-  while (getLexer().is(AsmToken::Comma)) {
-    // Consume comma token
-    getLexer().Lex();
-
+  while (parseOptionalToken(AsmToken::Comma)) {
     // Parse next operand
     if (parseOperand(Operands, Name))
       return true;