[PATCH] D152370: [Intrinsic] Introduce reduction intrinsics for minimum/maximum

[Anna Thomas via Phabricator via llvm-commits]

anna added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll:20
+; CHECK-NEXT:    ret
+  %b = call nnan half @llvm.vector.reduce.fmaximum.v1f16(<1 x half> %a)
+  ret half %b
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nikic wrote:
> Why do these all have `nnan` fmf?
I'll change this to (nnan for test we actually code generate v16f32 and one without for the same test) and remove for the rest of the tests. 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152370/new/

https://reviews.llvm.org/D152370