[PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 14 18:54:40 PDT 2023


arsenm added inline comments.


================
Comment at: llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp:47-48
+        .legalFor({XLenLLT})
+        .libcall()
+        .clampScalar(0, XLenLLT, XLenLLT);
+  }
----------------
I don't think ordering libcall before anything else will work


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152726/new/

https://reviews.llvm.org/D152726



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