[PATCH] D153098: [AArch64] Emit fewer CFI instructions for synchronous unwind tables

Igor Kudrin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 15 21:51:28 PDT 2023


ikudrin created this revision.
ikudrin added reviewers: chill, MaskRay, danielkiss, smeenai, efriedma, JohnReagan, MattDevereau, deadalnix.
ikudrin added a project: LLVM.
Herald added subscribers: armkevincheng, sjarus, eric-k256, asbirlea, hiraditya, kristof.beyls, qcolombet.
Herald added a project: All.
ikudrin requested review of this revision.

The instruction-precise, or asynchronous, unwind tables usually take up much more space than the synchronous ones. If a user is concerned about the load size of the program and does not need the features provided with the asynchronous tables, the compiler should be able to generate the more compact variant.

This patch changes the generation of CFI instructions for these cases so that they all come in one chunk in the prolog; it emits only one `.cfi_def_cfa*` instruction followed by `.cfi_offset` ones after all stack adjustments and register spills, and avoids generating CFI instructions in the epilog(s) as well as any other exceeding CFI instructions like `.cfi_remember_state` and `.cfi_restore_state`. Effectively, it reverses the effects of D111411 <https://reviews.llvm.org/D111411> and D114545 <https://reviews.llvm.org/D114545> on functions with the `uwtable(sync)` attribute. As a side effect, it also restores the behavior on functions that have neither `uwtable` nor `nounwind` attributes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153098

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/lib/Target/AArch64/AArch64FrameLowering.h
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
  llvm/test/CodeGen/AArch64/GlobalISel/merge-stores-truncating.ll
  llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
  llvm/test/CodeGen/AArch64/aarch64-fastcc-stackup.ll
  llvm/test/CodeGen/AArch64/aarch64-mops-consecutive.ll
  llvm/test/CodeGen/AArch64/aarch64-mops.ll
  llvm/test/CodeGen/AArch64/active_lane_mask.ll
  llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
  llvm/test/CodeGen/AArch64/addsub.ll
  llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
  llvm/test/CodeGen/AArch64/arm64-custom-call-saved-reg.ll
  llvm/test/CodeGen/AArch64/arm64-fp128.ll
  llvm/test/CodeGen/AArch64/arm64-large-frame.ll
  llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
  llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
  llvm/test/CodeGen/AArch64/arm64-neon-vector-list-spill.ll
  llvm/test/CodeGen/AArch64/arm64-patchpoint.ll
  llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
  llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
  llvm/test/CodeGen/AArch64/cfi-sync-async.ll
  llvm/test/CodeGen/AArch64/cmp-select-sign.ll
  llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll
  llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
  llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
  llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
  llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
  llvm/test/CodeGen/AArch64/i128-math.ll
  llvm/test/CodeGen/AArch64/isinf.ll
  llvm/test/CodeGen/AArch64/large-stack-cmp.ll
  llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
  llvm/test/CodeGen/AArch64/machine-combiner.ll
  llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
  llvm/test/CodeGen/AArch64/machine-outliner-throw2.ll
  llvm/test/CodeGen/AArch64/neg-imm.ll
  llvm/test/CodeGen/AArch64/peephole-and-tst.ll
  llvm/test/CodeGen/AArch64/ragreedy-csr.ll
  llvm/test/CodeGen/AArch64/regress-tblgen-chains.ll
  llvm/test/CodeGen/AArch64/shrink-wrap-byval-inalloca-preallocated.ll
  llvm/test/CodeGen/AArch64/sibling-call.ll
  llvm/test/CodeGen/AArch64/stack-guard-remat-bitcast.ll
  llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
  llvm/test/CodeGen/AArch64/sve-alloca.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
  llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests-crash.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
  llvm/test/CodeGen/AArch64/sve-fp-reduce.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector.ll
  llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
  llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
  llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
  llvm/test/CodeGen/AArch64/sve-trunc.ll
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-loads.ll
  llvm/test/CodeGen/AArch64/swifterror.ll
  llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir

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