[PATCH] D152688: [Aarch64] Add Cortex-A510 specific scheduling

[harvin iriawan via Phabricator via llvm-commits]

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- Update the Cortex-A510 mcpu target to use A510 scheduling info instead of A55. Values taken are based on the A510 software optimisation guide https://developer.arm.com/documentation/PJDOC-466751330-536816/latest
- Make latency of most integer ops to 1. CPU uarch is able to resolve most integer ops in 1 cycle


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152688

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64SchedA510.td
  llvm/test/tools/llvm-mca/AArch64/Cortex/A510-basic-instructions.s
  llvm/test/tools/llvm-mca/AArch64/Cortex/A510-sve-instructions.s