[compiler-rt] 42564f9 - [fuzzer][fuchsia] Support RISC-V
Roland McGrath via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 16 11:39:53 PDT 2023
Author: Roland McGrath
Date: 2023-06-16T11:39:32-07:00
New Revision: 42564f97e8ca17217057790d00a0408eaacf1f82
URL: https://github.com/llvm/llvm-project/commit/42564f97e8ca17217057790d00a0408eaacf1f82
DIFF: https://github.com/llvm/llvm-project/commit/42564f97e8ca17217057790d00a0408eaacf1f82.diff
LOG: [fuzzer][fuchsia] Support RISC-V
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D153082
Added:
Modified:
compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
Removed:
################################################################################
diff --git a/compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake b/compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
index 15c39233685cc..4c5081b76997b 100644
--- a/compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
+++ b/compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
@@ -45,6 +45,8 @@ elseif (OS_NAME MATCHES "Windows")
set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64})
elseif(OS_NAME MATCHES "Android")
set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${RISCV64})
+elseif(OS_NAME MATCHES "Fuchsia")
+ set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64} ${RISCV64})
else()
set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64})
endif()
diff --git a/compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp b/compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
index 2a21529fbf8ae..6a56505fbf1aa 100644
--- a/compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
+++ b/compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
@@ -87,6 +87,7 @@ void AlarmHandler(int Seconds) {
// Alternatively, Fuchsia may in future actually implement basic signal
// handling for the machine trap signals.
#if defined(__x86_64__)
+
#define FOREACH_REGISTER(OP_REG, OP_NUM) \
OP_REG(rax) \
OP_REG(rbx) \
@@ -107,6 +108,7 @@ void AlarmHandler(int Seconds) {
OP_REG(rip)
#elif defined(__aarch64__)
+
#define FOREACH_REGISTER(OP_REG, OP_NUM) \
OP_NUM(0) \
OP_NUM(1) \
@@ -140,6 +142,41 @@ void AlarmHandler(int Seconds) {
OP_NUM(29) \
OP_REG(sp)
+#elif defined(__riscv)
+
+#define FOREACH_REGISTER(OP_REG, OP_NUM) \
+ OP_REG(ra) \
+ OP_REG(sp) \
+ OP_REG(gp) \
+ OP_REG(tp) \
+ OP_REG(t0) \
+ OP_REG(t1) \
+ OP_REG(t2) \
+ OP_REG(s0) \
+ OP_REG(s1) \
+ OP_REG(a0) \
+ OP_REG(a1) \
+ OP_REG(a2) \
+ OP_REG(a3) \
+ OP_REG(a4) \
+ OP_REG(a5) \
+ OP_REG(a6) \
+ OP_REG(a7) \
+ OP_REG(s2) \
+ OP_REG(s3) \
+ OP_REG(s4) \
+ OP_REG(s5) \
+ OP_REG(s6) \
+ OP_REG(s7) \
+ OP_REG(s8) \
+ OP_REG(s9) \
+ OP_REG(s10) \
+ OP_REG(s11) \
+ OP_REG(t3) \
+ OP_REG(t4) \
+ OP_REG(t5) \
+ OP_REG(t6) \
+
#else
#error "Unsupported architecture for fuzzing on Fuchsia"
#endif
@@ -200,6 +237,13 @@ void MakeTrampoline() {
".cfi_offset 30, %c[lr]\n"
"bl %c[StaticCrashHandler]\n"
"brk 1\n"
+#elif defined(__riscv)
+ ".cfi_return_column 64\n"
+ ".cfi_def_cfa sp, 0\n"
+ ".cfi_offset 64, %[pc]\n"
+ FOREACH_REGISTER(CFI_OFFSET_REG, CFI_OFFSET_NUM)
+ "call %c[StaticCrashHandler]\n"
+ "unimp\n"
#else
#error "Unsupported architecture for fuzzing on Fuchsia"
#endif
@@ -209,8 +253,11 @@ void MakeTrampoline() {
".cfi_startproc\n"
: // No outputs
: FOREACH_REGISTER(ASM_OPERAND_REG, ASM_OPERAND_NUM)
+#if defined(__aarch64__) || defined(__riscv)
+ ASM_OPERAND_REG(pc)
+#endif
#if defined(__aarch64__)
- ASM_OPERAND_REG(pc) ASM_OPERAND_REG(lr)
+ ASM_OPERAND_REG(lr)
#endif
[StaticCrashHandler] "i"(StaticCrashHandler));
}
@@ -294,6 +341,7 @@ void CrashHandler() {
// onto the stack and jump into a trampoline with CFI instructions on how
// to restore it.
#if defined(__x86_64__)
+
uintptr_t StackPtr =
(GeneralRegisters.rsp - (128 + sizeof(GeneralRegisters))) &
-(uintptr_t)16;
@@ -302,7 +350,8 @@ void CrashHandler() {
GeneralRegisters.rsp = StackPtr;
GeneralRegisters.rip = reinterpret_cast<zx_vaddr_t>(CrashTrampolineAsm);
-#elif defined(__aarch64__)
+#elif defined(__aarch64__) || defined(__riscv)
+
uintptr_t StackPtr =
(GeneralRegisters.sp - sizeof(GeneralRegisters)) & -(uintptr_t)16;
__unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters,
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