[PATCH] D153034: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc on future isa
Amy Kwan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 16 11:39:19 PDT 2023
amyk added a comment.
Should it be "Future ISA" instead of "Future isa"?
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10721
+ // the v512i1 (vector_quad in C) type. Since these two intrinsics take one
+ // argument of type v512i1 a corresponding dmxxinstdmr512 or dmxxextfdmr512
+ // is always generated for the operand negating the need to produce the
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10723
+ // is always generated for the operand negating the need to produce the
+ // xxm[t|f]acc. Here we account for this by custom lowering these
+ // instrinsics to produce no instructions on future isa.
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Avoiding the use of `we` here.
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10730
+ for (SDNode *Use : OpNode->uses()) {
+ SmallVector<SDValue, 4> NewOps;
+ for (SDValue UseOp : Use->ops()) {
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Just a question since I am curious, but is there any special reason on why `4` is picked for the `SmallVector`?
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10724
+ // xxm[t|f]acc. Here we account for this by custom lowering these
+ // instrinsics to produce no instructions on PFuture.
+ if (!Subtarget.isISAFuture())
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Repository:
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https://reviews.llvm.org/D153034/new/
https://reviews.llvm.org/D153034
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