[llvm] 39e2232 - [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 16 16:39:46 PDT 2023
Author: Luke Lau
Date: 2023-06-16T16:39:39-07:00
New Revision: 39e2232942dd1970687bf36a73c79779a8d34977
URL: https://github.com/llvm/llvm-project/commit/39e2232942dd1970687bf36a73c79779a8d34977
DIFF: https://github.com/llvm/llvm-project/commit/39e2232942dd1970687bf36a73c79779a8d34977.diff
LOG: [RISCV] Reuse RISCVDAGToDAGISel member TTI in doPeepholeMaskedRVV. NFC
Differential Revision: https://reviews.llvm.org/D152960
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 0c47207f6d1de..6ecf71c83580d 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3177,8 +3177,7 @@ bool RISCVDAGToDAGISel::doPeepholeMaskedRVV(SDNode *N) {
// Retrieve the tail policy operand index, if any.
std::optional<unsigned> TailPolicyOpIdx;
- const RISCVInstrInfo &TII = *Subtarget->getInstrInfo();
- const MCInstrDesc &MaskedMCID = TII.get(N->getMachineOpcode());
+ const MCInstrDesc &MaskedMCID = TII->get(N->getMachineOpcode());
bool UseTUPseudo = false;
if (RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags)) {
@@ -3203,7 +3202,7 @@ bool RISCVDAGToDAGISel::doPeepholeMaskedRVV(SDNode *N) {
// If this instruction is tail agnostic, the unmasked instruction should not
// have a tied destination.
#ifndef NDEBUG
- const MCInstrDesc &MCID = TII.get(Opc);
+ const MCInstrDesc &MCID = TII->get(Opc);
bool HasTiedDest = RISCVII::isFirstDefTiedToFirstUse(MCID);
assert((UseTUPseudo == HasTiedDest) && "Unexpected pseudo to transform to");
#endif
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