[llvm] 78a0b2b - [GlobalIsel][X86] Regenerate legalize-add.mir with common CHECK prefix
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 14 07:04:36 PDT 2023
Author: Simon Pilgrim
Date: 2023-06-14T15:01:18+01:00
New Revision: 78a0b2be83ca945540cfea4461be491f739335e4
URL: https://github.com/llvm/llvm-project/commit/78a0b2be83ca945540cfea4461be491f739335e4
DIFF: https://github.com/llvm/llvm-project/commit/78a0b2be83ca945540cfea4461be491f739335e4.diff
LOG: [GlobalIsel][X86] Regenerate legalize-add.mir with common CHECK prefix
Added:
Modified:
llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
index 275cab5fca3f9..70e3af3b99870 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X64
-# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefix=X32
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
+# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X32
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %11:_(s32), %12:_(s1) = G_UADDO %7:_, %9:_ (in function: test_add_i42)
@@ -19,7 +19,6 @@
...
---
name: test_add_i1
-# CHECK-LABEL: name: test_add_i1
alignment: 16
legalized: false
regBankSelected: false
@@ -29,22 +28,14 @@ registers:
- { id: 2, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
- ; X64-LABEL: name: test_add_i1
- ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X64-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X64-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
- ; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
- ; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X64-NEXT: RET 0
- ; X32-LABEL: name: test_add_i1
- ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X32-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X32-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
- ; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
- ; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X32-NEXT: RET 0
+ ; CHECK-LABEL: name: test_add_i1
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
+ ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: RET 0
%0(s32) = COPY $edx
%1(s1) = G_TRUNC %0(s32)
%2(s1) = G_ADD %1, %1
@@ -54,7 +45,6 @@ body: |
...
---
name: test_add_i8
-# CHECK-LABEL: name: test_add_i1
alignment: 16
legalized: false
regBankSelected: false
@@ -62,27 +52,15 @@ registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
-# CHECK: %0(s32) = COPY $edx
-# CHECK-NEXT: %3(s8) = G_TRUNC %0(s32)
-# CHECK-NEXT: %4(s8) = G_TRUNC %0(s32)
-# CHECK-NEXT: %5(s8) = G_ADD %3, %4
-# CHECK: RET 0
body: |
bb.1 (%ir-block.0):
- ; X64-LABEL: name: test_add_i8
- ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X64-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC]]
- ; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
- ; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X64-NEXT: RET 0
- ; X32-LABEL: name: test_add_i8
- ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; X32-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC]]
- ; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
- ; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X32-NEXT: RET 0
+ ; CHECK-LABEL: name: test_add_i8
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
+ ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: RET 0
%0(s32) = COPY $edx
%1(s8) = G_TRUNC %0(s32)
%2(s8) = G_ADD %1, %1
@@ -101,20 +79,13 @@ registers:
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
- ; X64-LABEL: name: test_add_i16
- ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; X64-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[TRUNC]]
- ; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s16)
- ; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X64-NEXT: RET 0
- ; X32-LABEL: name: test_add_i16
- ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; X32-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[TRUNC]]
- ; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s16)
- ; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
- ; X32-NEXT: RET 0
+ ; CHECK-LABEL: name: test_add_i16
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s16)
+ ; CHECK-NEXT: $eax = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: RET 0
%0(s32) = COPY $edx
%1(s16) = G_TRUNC %0(s32)
%2(s16) = G_ADD %1, %1
@@ -133,16 +104,11 @@ registers:
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
- ; X64-LABEL: name: test_add_i27
- ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X64-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]]
- ; X64-NEXT: $eax = COPY [[ADD]](s32)
- ; X64-NEXT: RET 0
- ; X32-LABEL: name: test_add_i27
- ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
- ; X32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]]
- ; X32-NEXT: $eax = COPY [[ADD]](s32)
- ; X32-NEXT: RET 0
+ ; CHECK-LABEL: name: test_add_i27
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]]
+ ; CHECK-NEXT: $eax = COPY [[ADD]](s32)
+ ; CHECK-NEXT: RET 0
%0(s32) = COPY $edx
%1(s27) = G_TRUNC %0(s32)
%2(s27) = G_ADD %1, %1
@@ -161,18 +127,12 @@ registers:
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
- ; X64-LABEL: name: test_add_i32
- ; X64: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
- ; X64-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
- ; X64-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
- ; X64-NEXT: $eax = COPY [[ADD]](s32)
- ; X64-NEXT: RET 0
- ; X32-LABEL: name: test_add_i32
- ; X32: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
- ; X32-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
- ; X32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
- ; X32-NEXT: $eax = COPY [[ADD]](s32)
- ; X32-NEXT: RET 0
+ ; CHECK-LABEL: name: test_add_i32
+ ; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
+ ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
+ ; CHECK-NEXT: $eax = COPY [[ADD]](s32)
+ ; CHECK-NEXT: RET 0
%0(s32) = IMPLICIT_DEF
%1(s32) = IMPLICIT_DEF
%2(s32) = G_ADD %0, %1
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