[llvm] 3210cc9 - [X86] Add test for icmp/sub operand order across blocks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 15 02:34:29 PDT 2023
Author: Nikita Popov
Date: 2023-06-15T11:34:20+02:00
New Revision: 3210cc9a88b7249fae992dabef26c906e7e13330
URL: https://github.com/llvm/llvm-project/commit/3210cc9a88b7249fae992dabef26c906e7e13330
DIFF: https://github.com/llvm/llvm-project/commit/3210cc9a88b7249fae992dabef26c906e7e13330.diff
LOG: [X86] Add test for icmp/sub operand order across blocks (NFC)
Added:
Modified:
llvm/test/CodeGen/X86/cmp-merge.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/cmp-merge.ll b/llvm/test/CodeGen/X86/cmp-merge.ll
index bc0da24ff5d6e..7528eab12d755 100644
--- a/llvm/test/CodeGen/X86/cmp-merge.ll
+++ b/llvm/test/CodeGen/X86/cmp-merge.ll
@@ -84,3 +84,74 @@ define void @gt_first(i32 %0, i32 %1) {
9:
ret void
}
+
+define void @cmp_sub_same_order(i32 %x, i32 %y, ptr %p) {
+; X86-LABEL: cmp_sub_same_order:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: jge .LBB2_2
+; X86-NEXT: # %bb.1: # %cond.true
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: .LBB2_2: # %cond.end
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp_sub_same_order:
+; X64: # %bb.0: # %entry
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: jge .LBB2_2
+; X64-NEXT: # %bb.1: # %cond.true
+; X64-NEXT: movl %edi, (%rdx)
+; X64-NEXT: .LBB2_2: # %cond.end
+; X64-NEXT: retq
+entry:
+ %cmp = icmp slt i32 %x, %y
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true:
+ %sub = sub nsw i32 %x, %y
+ store i32 %sub, ptr %p
+ br label %cond.end
+
+cond.end:
+ ret void
+}
+
+define void @cmp_sub_
diff erent_order(i32 %x, i32 %y, ptr %p) {
+; X86-LABEL: cmp_sub_
diff erent_order:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: cmpl %ecx, %eax
+; X86-NEXT: jle .LBB3_2
+; X86-NEXT: # %bb.1: # %cond.true
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: subl %eax, %ecx
+; X86-NEXT: movl %ecx, (%edx)
+; X86-NEXT: .LBB3_2: # %cond.end
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp_sub_
diff erent_order:
+; X64: # %bb.0: # %entry
+; X64-NEXT: cmpl %edi, %esi
+; X64-NEXT: jle .LBB3_2
+; X64-NEXT: # %bb.1: # %cond.true
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: movl %edi, (%rdx)
+; X64-NEXT: .LBB3_2: # %cond.end
+; X64-NEXT: retq
+entry:
+ %cmp = icmp sgt i32 %y, %x
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true:
+ %sub = sub nsw i32 %x, %y
+ store i32 %sub, ptr %p
+ br label %cond.end
+
+cond.end:
+ ret void
+}
+
+declare void @use(i32)
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