[PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined

[Philip Reames via Phabricator via llvm-commits]

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This is a subset of D151653 <https://reviews.llvm.org/D151653>, slightly cleaned up.

A vmv.v.i splats the immediate to all active lanes.  For the active lanes, this is the same as vmv.s.x which inserts one scalar into the low lane.  If we can ignore all the inactive lanes (because they are known undefined), then the two are semantically equivalent.  We already reason about compatible VL/VTYPE combinations for vmv.s.x, apply the same logic to vmv.v.i.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152845

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll

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