[PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2

[JinGu Kang via Phabricator via llvm-commits]

jaykang10 added a comment.

In D150969#4413629 <https://reviews.llvm.org/D150969#4413629>, @dmgreen wrote:

> Thanks this looks good I think.
>
> Can you add a tests case where there is only an extract high created?

Let me add the tests.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22442-22443
+  // Find ExtractLow.
+  for (SDNode::use_iterator UI = ExtractHighSrcVec.getNode()->use_begin(),
+                            UE = ExtractHighSrcVec.getNode()->use_end();
+       UI != UE; ++UI) {
----------------
dmgreen wrote:
> `for (SDNode *User : ExtractHighSrcVec.getNode()->uses())`
Let me update it.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22464-22465
+  if (HasFoundMULLow && ExtractLow->hasOneUse()) {
+    SDNode::use_iterator UI = ExtractLow.getNode()->use_begin();
+    SDNode *ExtractLowUser = *UI;
+    if (ExtractLowUser->getOpcode() != N->getOpcode())
----------------
dmgreen wrote:
> `SDNode *ExtractLowUser = *ExtractLow.getNode()->use_begin();`
Let me update it.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22469
+
+    if (ExtractLowUser->getOperand(0).getNode() == ExtractLow.getNode()) {
+      if (ExtractLowUser->getOperand(1).getOpcode() == ISD::TRUNCATE)
----------------
dmgreen wrote:
> This can be `ExtractLowUser->getOperand(0) == ExtractLow` I think?
Let me update it.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:22503
+  SDValue NewTruncHigh = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, TruncHighVT,
+                                     UZP1, ExtractHigh.getOperand(1));
+  DAG.ReplaceAllUsesWith(TruncHigh, NewTruncHigh);
----------------
dmgreen wrote:
> Should TruncHighVT be UZP1VT, as we know the type of the UPZ1?
> It may be better to recreate the constant with the correct value for UZP1VT, to make sure with the bitcast we don't get it wrong.
Let me update it.


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  https://reviews.llvm.org/D150969/new/

https://reviews.llvm.org/D150969