[PATCH] D152740: [RISCV] Canonicalize towards vid w/passthrough representation
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 14:22:24 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3247
+ return V.isMachineOpcode() &&
+ V.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF;
+}
----------------
Same formatting question from the other patch.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3382
+ Ops.push_back(False);
+ Ops.append(True->op_begin()+1, True->op_begin() + TrueVLIndex);
Ops.append({VL, /* SEW */ True.getOperand(TrueVLIndex + 1)});
----------------
I think the `+1` should have spaces around the `+`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152740/new/
https://reviews.llvm.org/D152740
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