[llvm] e108aee - [test] Update the checking base for LE and BE
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 14 08:34:35 PDT 2023
Author: zhongyunde
Date: 2023-06-14T23:33:01+08:00
New Revision: e108aee956e138bf8164c810b155b2a577726755
URL: https://github.com/llvm/llvm-project/commit/e108aee956e138bf8164c810b155b2a577726755
DIFF: https://github.com/llvm/llvm-project/commit/e108aee956e138bf8164c810b155b2a577726755.diff
LOG: [test] Update the checking base for LE and BE
precommit tests for D147678 as we need tests cover BE too.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D152815
Added:
Modified:
llvm/test/CodeGen/AArch64/neon-bitcast.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/neon-bitcast.ll b/llvm/test/CodeGen/AArch64/neon-bitcast.ll
index 8f67ff83ae129..2b060f436c79a 100644
--- a/llvm/test/CodeGen/AArch64/neon-bitcast.ll
+++ b/llvm/test/CodeGen/AArch64/neon-bitcast.ll
@@ -1,48 +1,45 @@
-; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -verify-machineinstrs < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+; RUN: llc -mtriple=aarch64_be-none-linux-gnu -mattr=+neon -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-BE
; From <8 x i8>
define <1 x i64> @test_v8i8_to_v1i64(<8 x i8> %in) nounwind {
-; CHECK: test_v8i8_to_v1i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i8_to_v1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i8> %in to <1 x i64>
ret <1 x i64> %val
}
define <2 x i32> @test_v8i8_to_v2i32(<8 x i8> %in) nounwind {
-; CHECK: test_v8i8_to_v2i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i8_to_v2i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i8> %in to <2 x i32>
ret <2 x i32> %val
}
define <2 x float> @test_v8i8_to_v2f32(<8 x i8> %in) nounwind{
-; CHECK: test_v8i8_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i8_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i8> %in to <2 x float>
ret <2 x float> %val
}
define <4 x i16> @test_v8i8_to_v4i16(<8 x i8> %in) nounwind{
-; CHECK: test_v8i8_to_v4i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i8_to_v4i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i8> %in to <4 x i16>
ret <4 x i16> %val
}
define <8 x i8> @test_v8i8_to_v8i8(<8 x i8> %in) nounwind{
-; CHECK: test_v8i8_to_v8i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i8_to_v8i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i8> %in to <8 x i8>
ret <8 x i8> %val
}
@@ -50,46 +47,41 @@ define <8 x i8> @test_v8i8_to_v8i8(<8 x i8> %in) nounwind{
; From <4 x i16>
define <1 x i64> @test_v4i16_to_v1i64(<4 x i16> %in) nounwind {
-; CHECK: test_v4i16_to_v1i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i16_to_v1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i16> %in to <1 x i64>
ret <1 x i64> %val
}
define <2 x i32> @test_v4i16_to_v2i32(<4 x i16> %in) nounwind {
-; CHECK: test_v4i16_to_v2i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i16_to_v2i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i16> %in to <2 x i32>
ret <2 x i32> %val
}
define <2 x float> @test_v4i16_to_v2f32(<4 x i16> %in) nounwind{
-; CHECK: test_v4i16_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i16_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i16> %in to <2 x float>
ret <2 x float> %val
}
define <4 x i16> @test_v4i16_to_v4i16(<4 x i16> %in) nounwind{
-; CHECK: test_v4i16_to_v4i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i16_to_v4i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i16> %in to <4 x i16>
ret <4 x i16> %val
}
define <8 x i8> @test_v4i16_to_v8i8(<4 x i16> %in) nounwind{
-; CHECK: test_v4i16_to_v8i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i16_to_v8i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i16> %in to <8 x i8>
ret <8 x i8> %val
}
@@ -97,46 +89,41 @@ define <8 x i8> @test_v4i16_to_v8i8(<4 x i16> %in) nounwind{
; From <2 x i32>
define <1 x i64> @test_v2i32_to_v1i64(<2 x i32> %in) nounwind {
-; CHECK: test_v2i32_to_v1i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i32_to_v1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i32> %in to <1 x i64>
ret <1 x i64> %val
}
define <2 x i32> @test_v2i32_to_v2i32(<2 x i32> %in) nounwind {
-; CHECK: test_v2i32_to_v2i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i32_to_v2i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i32> %in to <2 x i32>
ret <2 x i32> %val
}
define <2 x float> @test_v2i32_to_v2f32(<2 x i32> %in) nounwind{
-; CHECK: test_v2i32_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i32_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i32> %in to <2 x float>
ret <2 x float> %val
}
define <4 x i16> @test_v2i32_to_v4i16(<2 x i32> %in) nounwind{
-; CHECK: test_v2i32_to_v4i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i32_to_v4i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i32> %in to <4 x i16>
ret <4 x i16> %val
}
define <8 x i8> @test_v2i32_to_v8i8(<2 x i32> %in) nounwind{
-; CHECK: test_v2i32_to_v8i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i32_to_v8i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i32> %in to <8 x i8>
ret <8 x i8> %val
}
@@ -144,46 +131,41 @@ define <8 x i8> @test_v2i32_to_v8i8(<2 x i32> %in) nounwind{
; From <2 x float>
define <1 x i64> @test_v2f32_to_v1i64(<2 x float> %in) nounwind {
-; CHECK: test_v2f32_to_v1i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f32_to_v1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x float> %in to <1 x i64>
ret <1 x i64> %val
}
define <2 x i32> @test_v2f32_to_v2i32(<2 x float> %in) nounwind {
-; CHECK: test_v2f32_to_v2i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f32_to_v2i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x float> %in to <2 x i32>
ret <2 x i32> %val
}
define <2 x float> @test_v2f32_to_v2f32(<2 x float> %in) nounwind{
-; CHECK: test_v2f32_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f32_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x float> %in to <2 x float>
ret <2 x float> %val
}
define <4 x i16> @test_v2f32_to_v4i16(<2 x float> %in) nounwind{
-; CHECK: test_v2f32_to_v4i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f32_to_v4i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x float> %in to <4 x i16>
ret <4 x i16> %val
}
define <8 x i8> @test_v2f32_to_v8i8(<2 x float> %in) nounwind{
-; CHECK: test_v2f32_to_v8i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f32_to_v8i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x float> %in to <8 x i8>
ret <8 x i8> %val
}
@@ -191,46 +173,41 @@ define <8 x i8> @test_v2f32_to_v8i8(<2 x float> %in) nounwind{
; From <1 x i64>
define <1 x i64> @test_v1i64_to_v1i64(<1 x i64> %in) nounwind {
-; CHECK: test_v1i64_to_v1i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v1i64_to_v1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <1 x i64> %in to <1 x i64>
ret <1 x i64> %val
}
define <2 x i32> @test_v1i64_to_v2i32(<1 x i64> %in) nounwind {
-; CHECK: test_v1i64_to_v2i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v1i64_to_v2i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <1 x i64> %in to <2 x i32>
ret <2 x i32> %val
}
define <2 x float> @test_v1i64_to_v2f32(<1 x i64> %in) nounwind{
-; CHECK: test_v1i64_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v1i64_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <1 x i64> %in to <2 x float>
ret <2 x float> %val
}
define <4 x i16> @test_v1i64_to_v4i16(<1 x i64> %in) nounwind{
-; CHECK: test_v1i64_to_v4i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v1i64_to_v4i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <1 x i64> %in to <4 x i16>
ret <4 x i16> %val
}
define <8 x i8> @test_v1i64_to_v8i8(<1 x i64> %in) nounwind{
-; CHECK: test_v1i64_to_v8i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v1i64_to_v8i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <1 x i64> %in to <8 x i8>
ret <8 x i8> %val
}
@@ -239,55 +216,49 @@ define <8 x i8> @test_v1i64_to_v8i8(<1 x i64> %in) nounwind{
; From <16 x i8>
define <2 x double> @test_v16i8_to_v2f64(<16 x i8> %in) nounwind {
-; CHECK: test_v16i8_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v16i8_to_v2i64(<16 x i8> %in) nounwind {
-; CHECK: test_v16i8_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v16i8_to_v4i32(<16 x i8> %in) nounwind {
-; CHECK: test_v16i8_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v16i8_to_v2f32(<16 x i8> %in) nounwind{
-; CHECK: test_v16i8_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v16i8_to_v8i16(<16 x i8> %in) nounwind{
-; CHECK: test_v16i8_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v16i8_to_v16i8(<16 x i8> %in) nounwind{
-; CHECK: test_v16i8_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v16i8_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <16 x i8> %in to <16 x i8>
ret <16 x i8> %val
}
@@ -295,55 +266,50 @@ define <16 x i8> @test_v16i8_to_v16i8(<16 x i8> %in) nounwind{
; From <8 x i16>
define <2 x double> @test_v8i16_to_v2f64(<8 x i16> %in) nounwind {
-; CHECK: test_v8i16_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i16_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v8i16_to_v2i64(<8 x i16> %in) nounwind {
-; CHECK: test_v8i16_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+;
+; CHECK-LABEL: test_v8i16_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v8i16_to_v4i32(<8 x i16> %in) nounwind {
-; CHECK: test_v8i16_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i16_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v8i16_to_v2f32(<8 x i16> %in) nounwind{
-; CHECK: test_v8i16_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i16_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v8i16_to_v8i16(<8 x i16> %in) nounwind{
-; CHECK: test_v8i16_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i16_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v8i16_to_v16i8(<8 x i16> %in) nounwind{
-; CHECK: test_v8i16_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v8i16_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <8 x i16> %in to <16 x i8>
ret <16 x i8> %val
}
@@ -351,55 +317,49 @@ define <16 x i8> @test_v8i16_to_v16i8(<8 x i16> %in) nounwind{
; From <4 x i32>
define <2 x double> @test_v4i32_to_v2f64(<4 x i32> %in) nounwind {
-; CHECK: test_v4i32_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v4i32_to_v2i64(<4 x i32> %in) nounwind {
-; CHECK: test_v4i32_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v4i32_to_v4i32(<4 x i32> %in) nounwind {
-; CHECK: test_v4i32_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v4i32_to_v2f32(<4 x i32> %in) nounwind{
-; CHECK: test_v4i32_to_v2f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v2f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v4i32_to_v8i16(<4 x i32> %in) nounwind{
-; CHECK: test_v4i32_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v4i32_to_v16i8(<4 x i32> %in) nounwind{
-; CHECK: test_v4i32_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4i32_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x i32> %in to <16 x i8>
ret <16 x i8> %val
}
@@ -407,55 +367,49 @@ define <16 x i8> @test_v4i32_to_v16i8(<4 x i32> %in) nounwind{
; From <4 x float>
define <2 x double> @test_v4f32_to_v2f64(<4 x float> %in) nounwind {
-; CHECK: test_v4f32_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v4f32_to_v2i64(<4 x float> %in) nounwind {
-; CHECK: test_v4f32_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v4f32_to_v4i32(<4 x float> %in) nounwind {
-; CHECK: test_v4f32_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v4f32_to_v4f32(<4 x float> %in) nounwind{
-; CHECK: test_v4f32_to_v4f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v4f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v4f32_to_v8i16(<4 x float> %in) nounwind{
-; CHECK: test_v4f32_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v4f32_to_v16i8(<4 x float> %in) nounwind{
-; CHECK: test_v4f32_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v4f32_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <4 x float> %in to <16 x i8>
ret <16 x i8> %val
}
@@ -463,55 +417,49 @@ define <16 x i8> @test_v4f32_to_v16i8(<4 x float> %in) nounwind{
; From <2 x i64>
define <2 x double> @test_v2i64_to_v2f64(<2 x i64> %in) nounwind {
-; CHECK: test_v2i64_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v2i64_to_v2i64(<2 x i64> %in) nounwind {
-; CHECK: test_v2i64_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v2i64_to_v4i32(<2 x i64> %in) nounwind {
-; CHECK: test_v2i64_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v2i64_to_v4f32(<2 x i64> %in) nounwind{
-; CHECK: test_v2i64_to_v4f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v4f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v2i64_to_v8i16(<2 x i64> %in) nounwind{
-; CHECK: test_v2i64_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v2i64_to_v16i8(<2 x i64> %in) nounwind{
-; CHECK: test_v2i64_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2i64_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x i64> %in to <16 x i8>
ret <16 x i8> %val
}
@@ -519,55 +467,49 @@ define <16 x i8> @test_v2i64_to_v16i8(<2 x i64> %in) nounwind{
; From <2 x double>
define <2 x double> @test_v2f64_to_v2f64(<2 x double> %in) nounwind {
-; CHECK: test_v2f64_to_v2f64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <2 x double>
ret <2 x double> %val
}
define <2 x i64> @test_v2f64_to_v2i64(<2 x double> %in) nounwind {
-; CHECK: test_v2f64_to_v2i64:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v2i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <2 x i64>
ret <2 x i64> %val
}
define <4 x i32> @test_v2f64_to_v4i32(<2 x double> %in) nounwind {
-; CHECK: test_v2f64_to_v4i32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v4i32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <4 x i32>
ret <4 x i32> %val
}
define <4 x float> @test_v2f64_to_v4f32(<2 x double> %in) nounwind{
-; CHECK: test_v2f64_to_v4f32:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v4f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <4 x float>
ret <4 x float> %val
}
define <8 x i16> @test_v2f64_to_v8i16(<2 x double> %in) nounwind{
-; CHECK: test_v2f64_to_v8i16:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v8i16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <8 x i16>
ret <8 x i16> %val
}
define <16 x i8> @test_v2f64_to_v16i8(<2 x double> %in) nounwind{
-; CHECK: test_v2f64_to_v16i8:
-; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ret
-
+; CHECK-LABEL: test_v2f64_to_v16i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ret
%val = bitcast <2 x double> %in to <16 x i8>
ret <16 x i8> %val
}
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