[PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 14:34:11 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVMoveOptimizer.cpp:9
+//
+// This file contains a pass that performs move related peephole
+// optimizations. This pass should be run after register allocation.
----------------
This description should mention Zcmp
================
Comment at: llvm/lib/Target/RISCV/RISCVMoveOptimizer.cpp:223
+
+ TII = static_cast<const RISCVInstrInfo *>(Subtarget->getInstrInfo());
+ TRI = Subtarget->getRegisterInfo();
----------------
This static_cast isn't necessary. `RISCVSubtarget` has an implementation of getInstrInfo that returns `RISCVInstrInfo *`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150415/new/
https://reviews.llvm.org/D150415
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