[PATCH] D153119: [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG)
Lu Weining via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 16 19:56:16 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4a69fd62699e: [LoongArch][NFC] Precommit test for D153120 (the fix of CSRWR and CSRXCHG) (authored by SixWeining).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153119/new/
https://reviews.llvm.org/D153119
Files:
llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
llvm/test/CodeGen/LoongArch/intrinsic.ll
Index: llvm/test/CodeGen/LoongArch/intrinsic.ll
===================================================================
--- llvm/test/CodeGen/LoongArch/intrinsic.ll
+++ llvm/test/CodeGen/LoongArch/intrinsic.ll
@@ -99,6 +99,17 @@
ret i32 %0
}
+;; Check that csrwr is emitted even if the return value of the intrinsic is not used.
+;; FIXME: currently csrwr is not emitted.
+define void @csrwr_w_noret(i32 signext %a) {
+; CHECK-LABEL: csrwr_w_noret:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call i32 @llvm.loongarch.csrwr.w(i32 %a, i32 1)
+ ret void
+}
+
define i32 @csrxchg_w(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: csrxchg_w:
; CHECK: # %bb.0: # %entry
@@ -109,6 +120,17 @@
ret i32 %0
}
+;; Check that csrxchg is emitted even if the return value of the intrinsic is not used.
+;; FIXME: currently csrxchg is not emitted.
+define void @csrxchg_w_noret(i32 signext %a, i32 signext %b) {
+; CHECK-LABEL: csrxchg_w_noret:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call i32 @llvm.loongarch.csrxchg.w(i32 %a, i32 %b, i32 1)
+ ret void
+}
+
define i32 @iocsrrd_b(i32 %a) {
; CHECK-LABEL: iocsrrd_b:
; CHECK: # %bb.0: # %entry
Index: llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
===================================================================
--- llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
+++ llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
@@ -121,6 +121,17 @@
ret i64 %0
}
+;; Check that csrwr is emitted even if the return value of the intrinsic is not used.
+;; FIXME: currently csrwr is not emitted.
+define void @csrwr_d_noret(i64 %a) {
+; CHECK-LABEL: csrwr_d_noret:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call i64 @llvm.loongarch.csrwr.d(i64 %a, i32 1)
+ ret void
+}
+
define i64 @csrxchg_d(i64 %a, i64 %b) {
; CHECK-LABEL: csrxchg_d:
; CHECK: # %bb.0: # %entry
@@ -131,6 +142,17 @@
ret i64 %0
}
+;; Check that csrxchg is emitted even if the return value of the intrinsic is not used.
+;; FIXME: currently csrxchg is not emitted.
+define void @csrxchg_d_noret(i64 %a, i64 %b) {
+; CHECK-LABEL: csrxchg_d_noret:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call i64 @llvm.loongarch.csrxchg.d(i64 %a, i64 %b, i32 1)
+ ret void
+}
+
define i64 @iocsrrd_d(i32 %a) {
; CHECK-LABEL: iocsrrd_d:
; CHECK: # %bb.0: # %entry
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