[PATCH] D152845: [RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 11:33:15 PDT 2023
reames planned changes to this revision.
reames added a comment.
Forgot to guard against LMUL increase, and we can handle vmv.v.x, and fvmv.v.f at the same time. Update pending.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D152845/new/
https://reviews.llvm.org/D152845
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