[PATCH] D152680: [RISCV][NFC] Improve encoding/decoding tests for Zbb instructions

[Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits]

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Currently `llvm/test/MC/RISCV/rv64zbb-valid.s` doesn't cover all
the instructions e.g. `maxu` and `llvm/test/MC/RISCV/rv32zbb-valid.s`
can have rv64 run lines, similar to what Zba instruction tests have.

This patch does the following.

- Add rv64 run lines in `llvm/test/MC/RISCV/rv32zbb-valid.s`
- Keep only rv64 specific instructions in `llvm/test/MC/RISCV/rv64zbb-valid.s`
- Move rv32 instructions, with different encodings from rv64, into `llvm/test/MC/RISCV/rv32zbb-only-valid.s`


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152680

Files:
  llvm/test/MC/RISCV/rv32zbb-only-valid.s
  llvm/test/MC/RISCV/rv32zbb-valid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

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