[PATCH] D152930: [AArch64] Don't look at type size for scalable types in isExtFreeImpl

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 14 08:56:15 PDT 2023


dmgreen created this revision.
dmgreen added reviewers: sdesmalen, david-arm, joechrisellis, harviniriawan, efriedma, paulwalker-arm.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a subscriber: alextsao1999.
Herald added a project: LLVM.

This fixes one of those 'Request for a fixed element count on a scalable object' errors in the AArch64 isExtFreeImpl method, where the uses of a sext are checked to see if the instruction can be considered free. https://godbolt.org/z/debYP9c4G


https://reviews.llvm.org/D152930

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll


Index: llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll
===================================================================
--- llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll
+++ llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
 
 ; This regression test is verifying that a GEP instruction performed on a
@@ -6,8 +7,22 @@
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 
-; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %retval = getelementptr
 define ptr @gep_scalable_vector(ptr %ptr) {
+; CHECK-LABEL: 'gep_scalable_vector'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %retval = getelementptr <vscale x 16 x i8>, ptr %ptr, i32 2
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret ptr %retval
+;
   %retval = getelementptr <vscale x 16 x i8>, ptr %ptr, i32 2
   ret ptr %retval
 }
+
+define ptr @sext_gep(ptr %p, i32 %a) {
+; CHECK-LABEL: 'sext_gep'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %b = sext i32 %a to i64
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r = getelementptr <vscale x 8 x half>, ptr %p, i64 %b
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret ptr %r
+;
+  %b = sext i32 %a to i64
+  %r = getelementptr <vscale x 8 x half>, ptr %p, i64 %b
+  ret ptr %r
+}
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -14098,6 +14098,8 @@
       // 8-bit sized types have a scaling factor of 1, thus a shift amount of 0.
       // Get the shift amount based on the scaling factor:
       // log2(sizeof(IdxTy)) - log2(8).
+      if (IdxTy->isScalableTy())
+        return false;
       uint64_t ShiftAmt =
           llvm::countr_zero(DL.getTypeStoreSizeInBits(IdxTy).getFixedValue()) -
           3;


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