[llvm] 7fcc35b - [GlobalIsel][X86] Update legalization of G_PHI/G_BRCOND

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-06-13T10:40:24+01:00
New Revision: 7fcc35b7a389058149b92be3de26548c76bed752

URL: https://github.com/llvm/llvm-project/commit/7fcc35b7a389058149b92be3de26548c76bed752
DIFF: https://github.com/llvm/llvm-project/commit/7fcc35b7a389058149b92be3de26548c76bed752.diff

LOG: [GlobalIsel][X86] Update legalization of G_PHI/G_BRCOND

Replace the legacy legalizer versions - still WIP but matches existing features, plus handles legal vector types.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86LegalizerInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
index 1e4bce34a877d..6898ab6e407d3 100644
--- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -270,6 +270,30 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
       .clampScalar(1, s16, sMaxScalar)
       .scalarSameSizeAs(0, 1);
 
+  // control flow
+  getActionDefinitionsBuilder(G_PHI)
+      .legalIf([=](const LegalityQuery &Query) -> bool {
+        return typeInSet(0, {s8, s16, s32, p0})(Query) ||
+               (Is64Bit && typeInSet(0, {s64})(Query)) ||
+               (HasSSE1 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) ||
+               (HasAVX && typeInSet(0, {v32s8, v16s16, v8s32, v4s64})(Query)) ||
+               (HasAVX512 &&
+                typeInSet(0, {v64s8, v32s16, v16s32, v8s64})(Query));
+      })
+      .clampMinNumElements(0, s8, 16)
+      .clampMinNumElements(0, s16, 8)
+      .clampMinNumElements(0, s32, 4)
+      .clampMinNumElements(0, s64, 2)
+      .clampMaxNumElements(0, s8, HasAVX512 ? 64 : (HasAVX ? 32 : 16))
+      .clampMaxNumElements(0, s16, HasAVX512 ? 32 : (HasAVX ? 16 : 8))
+      .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX ? 8 : 4))
+      .clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX ? 4 : 2))
+      .widenScalarToNextPow2(0, /*Min=*/32)
+      .clampScalar(0, s8, sMaxScalar)
+      .scalarize(0);
+
+  getActionDefinitionsBuilder(G_BRCOND).legalFor({s1});
+
   // pointer handling
   const std::initializer_list<LLT> PtrTypes32 = {s1, s8, s16, s32};
   const std::initializer_list<LLT> PtrTypes64 = {s1, s8, s16, s32, s64};
@@ -402,7 +426,6 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   setLegalizerInfoAVX512();
 
   auto &LegacyInfo = getLegacyLegalizerInfo();
-  LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(G_PHI, 0, widen_1);
   for (unsigned MemOp : {G_LOAD, G_STORE})
     LegacyInfo.setLegalizeScalarToDifferentSizeStrategy(
         MemOp, 0, LegacyLegalizerInfo::narrowToSmallerAndWidenToSmallest);
@@ -427,9 +450,6 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
 
   auto &LegacyInfo = getLegacyLegalizerInfo();
 
-  for (auto Ty : {s8, s16, s32, p0})
-    LegacyInfo.setAction({G_PHI, Ty}, LegacyLegalizeActions::Legal);
-
   for (unsigned Op : {G_UADDE}) {
     LegacyInfo.setAction({Op, s32}, LegacyLegalizeActions::Legal);
     LegacyInfo.setAction({Op, 1, s1}, LegacyLegalizeActions::Legal);
@@ -447,9 +467,6 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
   LegacyInfo.setAction({G_FRAME_INDEX, p0}, LegacyLegalizeActions::Legal);
   LegacyInfo.setAction({G_GLOBAL_VALUE, p0}, LegacyLegalizeActions::Legal);
 
-  // Control-flow
-  LegacyInfo.setAction({G_BRCOND, s1}, LegacyLegalizeActions::Legal);
-
   // Merge/Unmerge
   for (const auto &Ty : {s16, s32, s64}) {
     LegacyInfo.setAction({G_MERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
@@ -472,8 +489,6 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
 
   auto &LegacyInfo = getLegacyLegalizerInfo();
 
-  LegacyInfo.setAction({G_PHI, s64}, LegacyLegalizeActions::Legal);
-
   for (unsigned MemOp : {G_LOAD, G_STORE})
     LegacyInfo.setAction({MemOp, s64}, LegacyLegalizeActions::Legal);