[PATCH] D152821: [RISCV] Add support for Xcvmac extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 14:48:19 PDT 2023
realqhc updated this revision to Diff 531074.
realqhc added a comment.
address reviewer's concerns, fixed format on RISCVInstrInfoXCvmac.td, reorganized the tests, and added checks for newline in error messages.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152821/new/
https://reviews.llvm.org/D152821
Files:
llvm/docs/RISCVUsage.rst
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoXCvmac.td
llvm/test/MC/RISCV/corev/XCvmac-invalid.s
llvm/test/MC/RISCV/corev/XCvmac.s
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