[llvm] c67a326 - [NFC] Autogenerate several AArch64 tests.
Amaury Séchet via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 14 11:07:28 PDT 2023
Author: Amaury Séchet
Date: 2023-06-14T18:03:46Z
New Revision: c67a326dc59c31410eb723c6f765083b20259ac3
URL: https://github.com/llvm/llvm-project/commit/c67a326dc59c31410eb723c6f765083b20259ac3
DIFF: https://github.com/llvm/llvm-project/commit/c67a326dc59c31410eb723c6f765083b20259ac3.diff
LOG: [NFC] Autogenerate several AArch64 tests.
Added:
Modified:
llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll b/llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
index ac548385599f9..62f1b35720020 100644
--- a/llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
@@ -1,8 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
-; CHECK-LABEL: Str64Ldr64
-; CHECK: mov x0, x1
define i64 @Str64Ldr64(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov x0, x1
+; CHECK-NEXT: str x1, [x8, #8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -11,9 +16,13 @@ entry:
ret i64 %0
}
-; CHECK-LABEL: Str64Ldr32_0
-; CHECK: mov w0, w1
define i32 @Str64Ldr32_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr32_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str x1, [x8, #8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -22,9 +31,12 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Str64Ldr32_1
-; CHECK: lsr x0, x1, #32
define i32 @Str64Ldr32_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr32_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: lsr x0, x1, #32
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -33,9 +45,13 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Str64Ldr16_0
-; CHECK: mov w0, w1
define i16 @Str64Ldr16_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr16_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str x1, [x8, #8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -44,9 +60,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str64Ldr16_1
-; CHECK: ubfx x0, x1, #16, #16
define i16 @Str64Ldr16_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr16_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #16, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -55,9 +74,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str64Ldr16_2
-; CHECK: ubfx x0, x1, #32, #16
define i16 @Str64Ldr16_2(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr16_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #32, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -66,9 +88,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str64Ldr16_3
-; CHECK: lsr x0, x1, #48
define i16 @Str64Ldr16_3(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr16_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: lsr x0, x1, #48
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -77,9 +102,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str64Ldr8_0
-; CHECK: mov w0, w1
define i8 @Str64Ldr8_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str x1, [x8, #8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -88,9 +117,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_1
-; CHECK: ubfx x0, x1, #8, #8
define i8 @Str64Ldr8_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -99,9 +131,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_2
-; CHECK: ubfx x0, x1, #16, #8
define i8 @Str64Ldr8_2(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #16, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -110,9 +145,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_3
-; CHECK: ubfx x0, x1, #24, #8
define i8 @Str64Ldr8_3(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #24, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -121,9 +159,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_4
-; CHECK: ubfx x0, x1, #32, #8
define i8 @Str64Ldr8_4(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_4:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #32, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -132,9 +173,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_5
-; CHECK: ubfx x0, x1, #40, #8
define i8 @Str64Ldr8_5(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_5:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #40, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -143,9 +187,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_6
-; CHECK: ubfx x0, x1, #48, #8
define i8 @Str64Ldr8_6(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_6:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: ubfx x0, x1, #48, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -154,9 +201,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str64Ldr8_7
-; CHECK: lsr x0, x1, #56
define i8 @Str64Ldr8_7(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Str64Ldr8_7:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #8]
+; CHECK-NEXT: lsr x0, x1, #56
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx0
@@ -165,9 +215,13 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str32Ldr32
-; CHECK: mov w0, w1
define i32 @Str32Ldr32(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str w1, [x8, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -176,9 +230,13 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Str32Ldr16_0
-; CHECK: mov w0, w1
define i16 @Str32Ldr16_0(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr16_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str w1, [x8, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -187,9 +245,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str32Ldr16_1
-; CHECK: lsr w0, w1, #16
define i16 @Str32Ldr16_1(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr16_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: lsr w0, w1, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -198,9 +259,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str32Ldr8_0
-; CHECK: mov w0, w1
define i8 @Str32Ldr8_0(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: str w1, [x8, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -209,9 +274,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str32Ldr8_1
-; CHECK: ubfx w0, w1, #8, #8
define i8 @Str32Ldr8_1(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: ubfx w0, w1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -220,9 +288,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str32Ldr8_2
-; CHECK: ubfx w0, w1, #16, #8
define i8 @Str32Ldr8_2(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr8_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: ubfx w0, w1, #16, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -231,9 +302,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str32Ldr8_3
-; CHECK: lsr w0, w1, #24
define i8 @Str32Ldr8_3(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Str32Ldr8_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: lsr w0, w1, #24
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -242,9 +316,13 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str16Ldr16
-; CHECK: mov w0, w1
define i16 @Str16Ldr16(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Str16Ldr16:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: strh w1, [x8, #2]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 1
store i16 %v, ptr %arrayidx0
@@ -253,9 +331,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Str16Ldr8_0
-; CHECK: mov w0, w1
define i8 @Str16Ldr8_0(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Str16Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: strh w1, [x8, #2]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 1
store i16 %v, ptr %arrayidx0
@@ -264,9 +346,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Str16Ldr8_1
-; CHECK: ubfx w0, w1, #8, #8
define i8 @Str16Ldr8_1(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Str16Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: strh w1, [x0, #2]
+; CHECK-NEXT: ubfx w0, w1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 1
store i16 %v, ptr %arrayidx0
@@ -276,9 +361,13 @@ entry:
}
-; CHECK-LABEL: Unscaled_Str64Ldr64
-; CHECK: mov x0, x1
define i64 @Unscaled_Str64Ldr64(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov x0, x1
+; CHECK-NEXT: stur x1, [x8, #-8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -287,9 +376,13 @@ entry:
ret i64 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr32_0
-; CHECK: mov w0, w1
define i32 @Unscaled_Str64Ldr32_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr32_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur x1, [x8, #-8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -298,9 +391,12 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr32_1
-; CHECK: lsr x0, x1, #32
define i32 @Unscaled_Str64Ldr32_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr32_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: lsr x0, x1, #32
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -309,9 +405,13 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr16_0
-; CHECK: mov w0, w1
define i16 @Unscaled_Str64Ldr16_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr16_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur x1, [x8, #-8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -320,9 +420,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr16_1
-; CHECK: ubfx x0, x1, #16, #16
define i16 @Unscaled_Str64Ldr16_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr16_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #16, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -331,9 +434,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr16_2
-; CHECK: ubfx x0, x1, #32, #16
define i16 @Unscaled_Str64Ldr16_2(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr16_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #32, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -342,9 +448,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr16_3
-; CHECK: lsr x0, x1, #48
define i16 @Unscaled_Str64Ldr16_3(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr16_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: lsr x0, x1, #48
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -353,9 +462,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_0
-; CHECK: mov w0, w1
define i8 @Unscaled_Str64Ldr8_0(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur x1, [x8, #-8]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -364,9 +477,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_1
-; CHECK: ubfx x0, x1, #8, #8
define i8 @Unscaled_Str64Ldr8_1(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -375,9 +491,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_2
-; CHECK: ubfx x0, x1, #16, #8
define i8 @Unscaled_Str64Ldr8_2(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #16, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -386,9 +505,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_3
-; CHECK: ubfx x0, x1, #24, #8
define i8 @Unscaled_Str64Ldr8_3(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #24, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -397,9 +519,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_4
-; CHECK: ubfx x0, x1, #32, #8
define i8 @Unscaled_Str64Ldr8_4(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_4:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #32, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -408,9 +533,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_5
-; CHECK: ubfx x0, x1, #40, #8
define i8 @Unscaled_Str64Ldr8_5(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_5:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #40, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -419,9 +547,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_6
-; CHECK: ubfx x0, x1, #48, #8
define i8 @Unscaled_Str64Ldr8_6(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_6:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: ubfx x0, x1, #48, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -430,9 +561,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str64Ldr8_7
-; CHECK: lsr x0, x1, #56
define i8 @Unscaled_Str64Ldr8_7(ptr nocapture %P, i64 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str64Ldr8_7:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur x1, [x0, #-8]
+; CHECK-NEXT: lsr x0, x1, #56
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx0
@@ -441,9 +575,13 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr32
-; CHECK: mov w0, w1
define i32 @Unscaled_Str32Ldr32(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur w1, [x8, #-4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -452,9 +590,13 @@ entry:
ret i32 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr16_0
-; CHECK: mov w0, w1
define i16 @Unscaled_Str32Ldr16_0(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr16_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur w1, [x8, #-4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -463,9 +605,12 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr16_1
-; CHECK: lsr w0, w1, #16
define i16 @Unscaled_Str32Ldr16_1(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr16_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur w1, [x0, #-4]
+; CHECK-NEXT: lsr w0, w1, #16
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -474,9 +619,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr8_0
-; CHECK: mov w0, w1
define i8 @Unscaled_Str32Ldr8_0(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: stur w1, [x8, #-4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -485,9 +634,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr8_1
-; CHECK: ubfx w0, w1, #8, #8
define i8 @Unscaled_Str32Ldr8_1(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur w1, [x0, #-4]
+; CHECK-NEXT: ubfx w0, w1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -496,9 +648,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr8_2
-; CHECK: ubfx w0, w1, #16, #8
define i8 @Unscaled_Str32Ldr8_2(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr8_2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur w1, [x0, #-4]
+; CHECK-NEXT: ubfx w0, w1, #16, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -507,9 +662,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str32Ldr8_3
-; CHECK: lsr w0, w1, #24
define i8 @Unscaled_Str32Ldr8_3(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str32Ldr8_3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stur w1, [x0, #-4]
+; CHECK-NEXT: lsr w0, w1, #24
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -518,9 +676,13 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str16Ldr16
-; CHECK: mov w0, w1
define i16 @Unscaled_Str16Ldr16(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str16Ldr16:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: sturh w1, [x8, #-2]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 -1
store i16 %v, ptr %arrayidx0
@@ -529,9 +691,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_Str16Ldr8_0
-; CHECK: mov w0, w1
define i8 @Unscaled_Str16Ldr8_0(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str16Ldr8_0:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: mov w0, w1
+; CHECK-NEXT: sturh w1, [x8, #-2]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 -1
store i16 %v, ptr %arrayidx0
@@ -540,9 +706,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: Unscaled_Str16Ldr8_1
-; CHECK: ubfx w0, w1, #8, #8
define i8 @Unscaled_Str16Ldr8_1(ptr nocapture %P, i16 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_Str16Ldr8_1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: sturh w1, [x0, #-2]
+; CHECK-NEXT: ubfx w0, w1, #8, #8
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i16, ptr %P, i64 -1
store i16 %v, ptr %arrayidx0
@@ -551,9 +720,12 @@ entry:
ret i8 %0
}
-; CHECK-LABEL: StrVolatileLdr
-; CHECK: ldrh
define i16 @StrVolatileLdr(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: StrVolatileLdr:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: ldrh w0, [x0, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -562,9 +734,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: StrNotInRangeLdr
-; CHECK: ldrh
define i16 @StrNotInRangeLdr(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: StrNotInRangeLdr:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: ldrh w0, [x0, #2]
+; CHECK-NEXT: str w1, [x8, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -573,9 +749,13 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: Unscaled_StrNotInRangeLdr
-; CHECK: ldurh
define i16 @Unscaled_StrNotInRangeLdr(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: Unscaled_StrNotInRangeLdr:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: ldurh w0, [x0, #-6]
+; CHECK-NEXT: stur w1, [x8, #-4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 -1
store i32 %v, ptr %arrayidx0
@@ -584,9 +764,19 @@ entry:
ret i16 %0
}
-; CHECK-LABEL: StrCallLdr
-; CHECK: ldrh
define i16 @StrCallLdr(ptr nocapture %P, i32 %v, i64 %n) {
+; CHECK-LABEL: StrCallLdr:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: mov x19, x0
+; CHECK-NEXT: str w1, [x0, #4]
+; CHECK-NEXT: bl test_dummy
+; CHECK-NEXT: ldrh w0, [x19, #2]
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
@@ -598,9 +788,13 @@ entry:
declare i1 @test_dummy()
-; CHECK-LABEL: StrStrLdr
-; CHECK: ldrh
define i16 @StrStrLdr(i32 %v, ptr %P, ptr %P2, i32 %n) {
+; CHECK-LABEL: StrStrLdr:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w0, [x1, #4]
+; CHECK-NEXT: str w3, [x2]
+; CHECK-NEXT: ldrh w0, [x1, #4]
+; CHECK-NEXT: ret
entry:
%arrayidx0 = getelementptr inbounds i32, ptr %P, i64 1
store i32 %v, ptr %arrayidx0
diff --git a/llvm/test/CodeGen/AArch64/arm64-virtual_base.ll b/llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
index 01d778bfd6af7..853811d551ab2 100644
--- a/llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -O3 -mtriple=arm64-apple-ios -disable-post-ra | FileCheck %s
; <rdar://13463602>
@@ -32,11 +33,20 @@
%struct.Bezier_Node_Struct = type { i32, [3 x double], double, i32, ptr }
define void @Precompute_Patch_Values(ptr %Shape) {
-; CHECK: Precompute_Patch_Values
-; CHECK: ldr [[VAL2:q[0-9]+]], [x0, #272]
-; CHECK-NEXT: ldr [[VAL:x[0-9]+]], [x0, #288]
-; CHECK-NEXT: stur [[VAL2]], [sp, #216]
-; CHECK-NEXT: str [[VAL]], [sp, #232]
+; CHECK-LABEL: Precompute_Patch_Values:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub sp, sp, #400
+; CHECK-NEXT: .cfi_def_cfa_offset 400
+; CHECK-NEXT: stp x28, x27, [sp, #384] ; 16-byte Folded Spill
+; CHECK-NEXT: .cfi_offset w27, -8
+; CHECK-NEXT: .cfi_offset w28, -16
+; CHECK-NEXT: ldr q0, [x0, #272]
+; CHECK-NEXT: ldr x8, [x0, #288]
+; CHECK-NEXT: stur q0, [sp, #216]
+; CHECK-NEXT: str x8, [sp, #232]
+; CHECK-NEXT: ldp x28, x27, [sp, #384] ; 16-byte Folded Reload
+; CHECK-NEXT: add sp, sp, #400
+; CHECK-NEXT: ret
entry:
%Control_Points = alloca [16 x [3 x double]], align 8
%arraydecay5.3.1 = getelementptr inbounds [16 x [3 x double]], ptr %Control_Points, i64 0, i64 9, i64 0
diff --git a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
index c8caee2b49a8c..f649f7d28fc3a 100644
--- a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; FIXME: Add tests for global-isel/fast-isel.
; RUN: llc < %s -mtriple=arm64-windows | FileCheck %s
@@ -105,66 +106,134 @@ entry:
; aggregate).
%struct.NotPod = type { %struct.NotCXX14Aggregate }
-; CHECK-LABEL: copy_pod:
define dso_local %struct.Pod @copy_pod(ptr %x) {
+; CHECK-LABEL: copy_pod:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ldp d0, d1, [x0]
+; CHECK-NEXT: ret
%x1 = load %struct.Pod, ptr %x, align 8
ret %struct.Pod %x1
- ; CHECK: ldp d0, d1, [x0]
}
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
+define dso_local void @copy_notcxx14aggregate(ptr inreg noalias sret(%struct.NotCXX14Aggregate) align 8 %agg.result, ptr %x) {
; CHECK-LABEL: copy_notcxx14aggregate:
-define dso_local void
- at copy_notcxx14aggregate(ptr inreg noalias sret(%struct.NotCXX14Aggregate) align 8 %agg.result,
- ptr %x) {
+; CHECK: // %bb.0:
+; CHECK-NEXT: ldr q0, [x1]
+; CHECK-NEXT: str q0, [x0]
+; CHECK-NEXT: ret
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %agg.result, ptr align 8 %x, i64 16, i1 false)
ret void
- ; CHECK: str q0, [x0]
}
-; CHECK-LABEL: copy_notpod:
define dso_local [2 x i64] @copy_notpod(ptr %x) {
+; CHECK-LABEL: copy_notpod:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ldp x8, x1, [x0]
+; CHECK-NEXT: mov x0, x8
+; CHECK-NEXT: ret
%x2 = load [2 x i64], ptr %x
ret [2 x i64] %x2
- ; CHECK: ldp x8, x1, [x0]
- ; CHECK: mov x0, x8
}
@Pod = external global %struct.Pod
-; CHECK-LABEL: call_copy_pod:
define void @call_copy_pod() {
+; CHECK-LABEL: call_copy_pod:
+; CHECK: .seh_proc call_copy_pod
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: str x19, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg_x x19, 16
+; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg x30, 8
+; CHECK-NEXT: .seh_endprologue
+; CHECK-NEXT: adrp x19, Pod
+; CHECK-NEXT: add x19, x19, :lo12:Pod
+; CHECK-NEXT: mov x0, x19
+; CHECK-NEXT: bl copy_pod
+; CHECK-NEXT: str d0, [x19]
+; CHECK-NEXT: str d1, [x19, #8]
+; CHECK-NEXT: .seh_startepilogue
+; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg x30, 8
+; CHECK-NEXT: ldr x19, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 16
+; CHECK-NEXT: .seh_endepilogue
+; CHECK-NEXT: ret
+; CHECK-NEXT: .seh_endfunclet
+; CHECK-NEXT: .seh_endproc
%x = call %struct.Pod @copy_pod(ptr @Pod)
store %struct.Pod %x, ptr @Pod
ret void
- ; CHECK: bl copy_pod
- ; CHECK-NEXT: str d0, [{{.*}}]
- ; CHECK-NEXT: str d1, [{{.*}}]
}
@NotCXX14Aggregate = external global %struct.NotCXX14Aggregate
-; CHECK-LABEL: call_copy_notcxx14aggregate:
define void @call_copy_notcxx14aggregate() {
+; CHECK-LABEL: call_copy_notcxx14aggregate:
+; CHECK: .seh_proc call_copy_notcxx14aggregate
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #32
+; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: str x19, [sp, #16] // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg x19, 16
+; CHECK-NEXT: str x30, [sp, #24] // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg x30, 24
+; CHECK-NEXT: .seh_endprologue
+; CHECK-NEXT: adrp x19, NotCXX14Aggregate
+; CHECK-NEXT: add x19, x19, :lo12:NotCXX14Aggregate
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: mov x1, x19
+; CHECK-NEXT: bl copy_notcxx14aggregate
+; CHECK-NEXT: ldp d0, d1, [sp]
+; CHECK-NEXT: stp d0, d1, [x19]
+; CHECK-NEXT: .seh_startepilogue
+; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg x30, 24
+; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg x19, 16
+; CHECK-NEXT: add sp, sp, #32
+; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: .seh_endepilogue
+; CHECK-NEXT: ret
+; CHECK-NEXT: .seh_endfunclet
+; CHECK-NEXT: .seh_endproc
%x = alloca %struct.NotCXX14Aggregate
call void @copy_notcxx14aggregate(ptr %x, ptr @NotCXX14Aggregate)
%x1 = load %struct.NotCXX14Aggregate, ptr %x
store %struct.NotCXX14Aggregate %x1, ptr @NotCXX14Aggregate
ret void
- ; CHECK: bl copy_notcxx14aggregate
- ; CHECK-NEXT: ldp {{.*}}, {{.*}}, [sp]
}
@NotPod = external global %struct.NotPod
-; CHECK-LABEL: call_copy_notpod:
define void @call_copy_notpod() {
+; CHECK-LABEL: call_copy_notpod:
+; CHECK: .seh_proc call_copy_notpod
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: str x19, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg_x x19, 16
+; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
+; CHECK-NEXT: .seh_save_reg x30, 8
+; CHECK-NEXT: .seh_endprologue
+; CHECK-NEXT: adrp x19, NotPod
+; CHECK-NEXT: add x19, x19, :lo12:NotPod
+; CHECK-NEXT: mov x0, x19
+; CHECK-NEXT: bl copy_notpod
+; CHECK-NEXT: stp x0, x1, [x19]
+; CHECK-NEXT: .seh_startepilogue
+; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg x30, 8
+; CHECK-NEXT: ldr x19, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 16
+; CHECK-NEXT: .seh_endepilogue
+; CHECK-NEXT: ret
+; CHECK-NEXT: .seh_endfunclet
+; CHECK-NEXT: .seh_endproc
%x = call [2 x i64] @copy_notpod(ptr @NotPod)
store [2 x i64] %x, ptr @NotPod
ret void
- ; CHECK: bl copy_notpod
- ; CHECK-NEXT: stp x0, x1, [{{.*}}]
}
; We shouldn't return the argument
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