[PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode

[Momchil Velikov via Phabricator via llvm-commits]

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This patch adds a new code transformation to the `MachineSink` pass,
that tries to sink copies of an instruction, when the copies can be folded
into the addressing modes of load/store instructions, or
replace another instruction (currently, copies into a hard register).

The criteria for performing the transformation is that:

- the register pressure at the sink destination block must not exceed the register pressure limits
- the latency and throughput of the load/store or the copy must not deteriorate
- the original instruction must be deleted


https://reviews.llvm.org/D152828

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/test/CodeGen/AArch64/loop-sink.mir
  llvm/test/CodeGen/AArch64/sink-and-fold.ll

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