[PATCH] D153057: [RISCV] Introduce RISCVISD::VWMACC(U/SU)_VL opcode

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:15741
   NODE_NAME_CASE(VWSUBU_W_VL)
+  NODE_NAME_CASE(VWMACC_VL)
+  NODE_NAME_CASE(VWMACCU_VL)
----------------
I think these case statements are in nearly the same order as the RISCVISelLowering.h enum. Please use the same order.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153057/new/

https://reviews.llvm.org/D153057