[llvm] 8a40316 - [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-06-16T09:23:01-07:00
New Revision: 8a403166aa617d66bf420ec11350e9e0f4d1f02f

URL: https://github.com/llvm/llvm-project/commit/8a403166aa617d66bf420ec11350e9e0f4d1f02f
DIFF: https://github.com/llvm/llvm-project/commit/8a403166aa617d66bf420ec11350e9e0f4d1f02f.diff

LOG: [RISCV] Treat __riscv_vsetvl_*(-1) as vlmax.

We already treat -1 passed to instruction intrinsics as vlmax, this
make vsetvli consistent.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D152954

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index ea7cc1ca1e8b5..0c47207f6d1de 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -581,7 +581,7 @@ void RISCVDAGToDAGISel::selectVSETVLI(SDNode *Node) {
 
   SDValue VLOperand;
   unsigned Opcode = RISCV::PseudoVSETVLI;
-  if (VLMax) {
+  if (VLMax || isAllOnesConstant(Node->getOperand(1))) {
     VLOperand = CurDAG->getRegister(RISCV::X0, XLenVT);
     Opcode = RISCV::PseudoVSETVLIX0;
   } else {

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll b/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
index 8d059c51cccab..b7c0f84e01c8b 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
@@ -126,3 +126,12 @@ define <vscale x 4 x i32> @repeated_vsetvli(iXLen %avl, <vscale x 4 x i32>* %ptr
   %x = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.iXLen(<vscale x 4 x i32> undef, <vscale x 4 x i32>* %ptr, iXLen %vl1)
   ret <vscale x 4 x i32> %x
 }
+
+define iXLen @test_vsetvli_negone_e8m1(iXLen %avl) nounwind {
+; CHECK-LABEL: test_vsetvli_negone_e8m1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
+; CHECK-NEXT:    ret
+  %vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen -1, iXLen 0, iXLen 0)
+  ret iXLen %vl
+}