[PATCH] D152827: [AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap

[Momchil Velikov via Phabricator via llvm-commits]

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These are marked to be "as cheap as a move".

According to publicly available Software Optimization Guides, they
have one cycle latency and maximum throughput only on some
microarchitectures, only for `LSL` and only for some shift amounts.

This patch uses the subtarget feature `FeatureLSLFast` to determine
how cheap the instructions are. As a consequence, each subtarget
with `FeatureLSLFast` now also has `FeatureCustomCheapAsMoveHandling` added.


https://reviews.llvm.org/D152827

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

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