[PATCH] D152890: [RISCV] Reduce the number of ExtInfo_rr permutations in tablegen.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Add ExtraPreds parameter to FPUnaryOp_r_frm_m to pass IsRV64 so we
don't need RV64 versions of ExtInfo_rr.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152890

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td

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