[PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op
Luke Lau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 14 15:07:44 PDT 2023
luke added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll:475
; CHECK: # %bb.0:
-; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
+; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
; CHECK-NEXT: vadd.vv v8, v9, v10
----------------
luke wrote:
> craig.topper wrote:
> > Was something other than compares affected that changed this test?
> Yeah, this changes the interaction with the vmerge fold combine. The combine turns this DAG:
>
> ```
> t27: nxv2i32 = PseudoVADD_VV_M1_MASK IMPLICIT_DEF:nxv2i32, t4, t6, Register:nxv2i1 $v0, t8, TargetConstant:i64<5>, TargetConstant:i64<1>, t35:1
> t4: nxv2i32,ch = CopyFromReg t0, Register:nxv2i32 %1
> t0: ch,glue = EntryToken
> t6: nxv2i32,ch = CopyFromReg t0, Register:nxv2i32 %2
> t8: i64,ch = CopyFromReg t0, Register:i64 %3
> t35: ch,glue = CopyToReg t0, Register:nxv2i1 $v0, t30
> t30: nxv2i1 = PseudoVMSET_M_B2 TargetConstant:i64<-1>, TargetConstant:i64<0>
> ```
>
> Into this:
>
> ```
> t39: nxv2i32 = PseudoVADD_VV_M1_MASK t2, t4, t6, Register:nxv2i1 $v0, t8, TargetConstant:i64<5>, TargetConstant:i64<0>, t33:1
> t2: nxv2i32,ch = CopyFromReg t0, Register:nxv2i32 %0
> t0: ch,glue = EntryToken
> t4: nxv2i32,ch = CopyFromReg t0, Register:nxv2i32 %1
> t6: nxv2i32,ch = CopyFromReg t0, Register:nxv2i32 %2
> t8: i64,ch = CopyFromReg t0, Register:i64 %3
> t33: ch,glue = CopyToReg t0, Register:nxv2i1 $v0, t30
> t30: nxv2i1 = PseudoVMSET_M_B2 TargetConstant:i64<-1>, TargetConstant:i64<0>
> ```
>
> I.e. the merge operand in PseudoVADD_VV_M1_MASK is now set to something that isn't implicit_def.
> But previously doPeepholeMaskedRVV would have converted this into a tail undefined `PseudoVADD_VV_M1` anyway, even though we need to preserve the merge operand. The tail undefined then got translated into a ta policy.
*turns this node:
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152963/new/
https://reviews.llvm.org/D152963
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