[PATCH] D151482: [LV] Add support for minimum/maximum intrinsics

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Hello. I've been looking at the AArch64 lowering lately, and some of the other little bits and pieces like cost modelling. From what I can tell this mostly LGTM, but can you add a test with interleaving? It appears to go via createMinMaxOp->getMinMaxReductionPredicate.



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Comment at: llvm/lib/Analysis/IVDescriptors.cpp:808
       return isSelectCmpPattern(L, OrigPhi, I, Prev);
+    auto HasRequiredFMF = [&]() {
+     if (FuncFMF.noNaNs() && FuncFMF.noSignedZeros())
----------------
I'm not sure that minnum would require nnan and nsz to convert to a vector.reduce.fmin intrinsic. That might come from it matching select/fcmp, and sounds like a separate issue though.


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https://reviews.llvm.org/D151482