The Week Of Monday 13 July 2026 Archives by date

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Starting: Mon Jul 13 00:00:06 PDT 2026
Ending: Sun Jul 19 23:57:28 PDT 2026
Messages: 6577

• [llvm] [SCEV][NFC] Address post-merge comments on precommit test (PR #209094)   via llvm-commits
• [llvm] [NFC] Precommit tests for #208778 (PR #208784)   Aleksandr Popov via llvm-commits
• [llvm] ca970f3 - [VPlan] Simplify reverses through unary ops (fneg) (#208257)   via llvm-commits
• [llvm] [VPlan] Simplify reverses through unary ops (fneg) (PR #208257)   Luke Lau via llvm-commits
• [llvm] [RISC-V] Make Short Forward Branches capable of matching Zibi instructions (PR #208637)   Jesse Huang via llvm-commits
• [llvm] [RISC-V] Make Short Forward Branches capable of matching Zibi instructions (PR #208637)   Jesse Huang via llvm-commits
• [llvm] [Analysis] Add function-scoped DDG DOT printer (dot-function-ddg) (PR #209089)   Sumukh J Bharadwaj via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Shikhar Jain via llvm-commits
• [llvm] Reapply "[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns" (#199371) (PR #208999)   Nikita Popov via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Shikhar Jain via llvm-commits
• [llvm] [Analysis] Add function-scoped DDG DOT printer (dot-function-ddg) (PR #209089)   Sumukh J Bharadwaj via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Shikhar Jain via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] f97cdc4 - [PowerPC] Specify inlining behavior in TableGen (#206938)   via llvm-commits
• [llvm] [PowerPC] Specify inlining behavior in TableGen (PR #206938)   Nikita Popov via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [lld] 2119e35 - [lld][ELF] Concatenate .gnu.build.attributes.* sections (#208737)   via llvm-commits
• [lld] [lld][ELF] Concatenate .gnu.build.attributes.* sections (PR #208737)   Nikita Popov via llvm-commits
• [llvm] 56e62e5 - [WebAssembly] Use generic pseudo_fmin/pseudo_fmax opcodes (#208454)   via llvm-commits
• [llvm] [WebAssembly] Use generic pseudo_fmin/pseudo_fmax opcodes (PR #208454)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Add computeKnownBits support for ISD::VECREDUCE_ADD (PR #207631)   Sabona Abdi via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [CodeGen] Add EmitCodeGenCallSiteInfo flag (PR #206668)   Zhaoxuan Jiang via llvm-commits
• [llvm] 32f3f9d - [SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (#208150)   via llvm-commits
• [llvm] [SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (PR #208150)   via llvm-commits
• [llvm] [AArch64] Clear kill flags from visitINSvi64lane (PR #209096)   David Green via llvm-commits
• [llvm] 2de67c3 - [AArch64] Clear kill flags from visitINSvi64lane (#209096)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [llvm] [AArch64] Clear kill flags from visitINSvi64lane (PR #209096)   David Green via llvm-commits
• [llvm] [InstCombine] Treat `uitofp nneg` as non-negative signed range for fcmp clamp folds (PR #208234)   via llvm-commits
• [compiler-rt] [libcxx] [libcxxabi] [libunwind] [llvm] for ohos llvm libcxx (PR #208390)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [clang] [llvm] [CHERI][RISCV][AArch64][MC] Add shared support for aligning globals to an "alignment granule", which is applied to both the alignment and the allocated size. (PR #203872)   Owen Anderson via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Nathan Corbyn via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Nathan Corbyn via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Nathan Corbyn via llvm-commits
• [llvm] [Instrumentation] Add TSan instrumentation for AMDGPU targets (PR #207713)   Alexander Shaposhnikov via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Feng Zou via llvm-commits
• [llvm] [VPlan] Don't bail creating interleave group if it has dead members (PR #208415)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't bail creating interleave group if it has dead members (PR #208415)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add SelectAddrRegImm26 isel complex pattern for Xqcilo 26-bit load/store (PR #207363)   Sudharsan Veeravalli via llvm-commits
• [llvm] [SelectionDAG] Add computeKnownBits support for ISD::VECREDUCE_ADD (PR #207631)   Luke Lau via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [VPlan] Migrate convertToStridedAccesses to VPSCEVExpander (PR #208939)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [Object][GOFF] Recognize RLD and LEN records (PR #207118)   James Henderson via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [ConstraintElimination] Handle equality predicates with signed system (PR #205331)   Florian Hahn via llvm-commits
• [llvm] [llvm-calc-occupancy] Add an AMDGPU occupancy calculator tool (PR #208727)   via llvm-commits
• [llvm] [llvm-calc-occupancy] Add an AMDGPU occupancy calculator tool (PR #208727)   via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributorOnFunctions (PR #209103)   Wenju He via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributorOnFunctions (PR #209103)   via llvm-commits
• [llvm] [VPlan] Migrate convertToStridedAccesses to VPSCEVExpander (PR #208939)   via llvm-commits
• [llvm] [Analysis] Add function-scoped DDG DOT printer (dot-function-ddg) (PR #209089)   via llvm-commits
• [llvm] [SCEV][NFC] Address post-merge comments on precommit test (PR #209094)   Aleksandr Popov via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (PR #209088)   Hongyu Chen via llvm-commits
• [llvm] [RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (PR #209088)   Hongyu Chen via llvm-commits
• [lld] TYPO: fixed a few typos in NewLLD.rst (PR #193569)   Benjamin Maxwell via llvm-commits
• [lld] f48baca - [Docs][NFC] Fix a few typos in NewLLD.rst (#193569)   via llvm-commits
• [lld] TYPO: fixed a few typos in NewLLD.rst (PR #193569)   Benjamin Maxwell via llvm-commits
• [lld] TYPO: fixed a few typos in NewLLD.rst (PR #193569)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (PR #208893)   Fabian Ritter via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (PR #208893)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] [SelectionDAG] Add computeKnownBits support for ISD::VECREDUCE_ADD (PR #207631)   Simon Pilgrim via llvm-commits
• [llvm] coro.retcon: Fix return type and buffer poisoning in elided coroutines (PR #208384)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (PR #209069)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (PR #208300)   Pierre van Houtryve via llvm-commits
• [llvm] [dyndbg][AsmPrinter] Add tail padding attributes (PR #194852)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider scalars (PR #207999)   Petar Avramovic via llvm-commits
• [llvm] [WIP][X86] Replace custom ADD reduction pattern matching with ISD::VECREDUCE_ADD support (PR #205098)   Simon Pilgrim via llvm-commits
• [llvm] 3a61e72 - [ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (#203318)   via llvm-commits
• [llvm] [ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (PR #203318)   Simon Tatham via llvm-commits
• [llvm] [ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (PR #203318)   Simon Tatham via llvm-commits
• [llvm] [ARM][Thumb1] Verify EstimateFunctionSizeInBytes every time (PR #203319)   Simon Tatham via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_ADD of a constant BUILD_VECTOR (PR #207560)   Simon Pilgrim via llvm-commits
• [polly] [Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (PR #206063)   Pawan Nirpal via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Combine rcp(sqrt(x)) into rsq for pseudo-scalar instructions (PR #198785)   Madhur Kumar via llvm-commits
• [llvm] [Analysis] Add function-scoped DDG DOT printer (dot-function-ddg) (PR #209089)   Sumukh J Bharadwaj via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Pengcheng Wang via llvm-commits
• [llvm] [IR][NFC] Add parentheses around logical AND (PR #208512)   via llvm-commits
• [llvm] [VPlan] Migrate convertToStridedAccesses to VPSCEVExpander (PR #208939)   Luke Lau via llvm-commits
• [clang] [compiler-rt] [clang][CodeGen] Model vtable pointer as TBAA member of polymorphic types (PR #209053)   Gustas Janušonis via llvm-commits
• [llvm] [lit] Don't crash in _write_message when getsourcefile() returns None (PR #206957)   James Henderson via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [AMDGPU] Implement int div/rem by fp recip more efficiently (PR #204950)   via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [OpenMP][Offload] Fix flang offload test (PR #208829)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] cec7cf4 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (#208893)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (PR #208893)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (PR #208894)   Matt Arsenault via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] 6e42e25 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (#208894)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (PR #208894)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (PR #208895)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [RISCV] Add getJumpConditionMergingParams to support branch condition merging (PR #206897)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add getJumpConditionMergingParams to support branch condition merging (PR #206897)   Pengcheng Wang via llvm-commits
• [llvm] [openmp] [OpenMP] Publish target-init team state with acq_rel barrier (PR #208701)   Abid Qadeer via llvm-commits
• [llvm] [IR][NFC] Add parentheses around logical AND (PR #208512)   Nikolas Klauser via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make Za64rs imply Za128rs (PR #206638)   Ying Wang via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   via llvm-commits
• [llvm] [MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (PR #209113)   Fred Tingaud via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   Harry Ramsey via llvm-commits
• [llvm] [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (PR #207842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (PR #207842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (PR #207842)   Florian Hahn via llvm-commits
• [llvm] [mlir] Fix affine for fold detached block (PR #209111)   via llvm-commits
• [llvm] [MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (PR #209113)   Fred Tingaud via llvm-commits
• [llvm] [MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (PR #209113)   Fred Tingaud via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   via llvm-commits
• [llvm] [MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (PR #209113)   Fred Tingaud via llvm-commits
• [llvm] [AMDGPU] Implement int div/rem by fp recip more efficiently (PR #204950)   via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   David Spickett via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   David Spickett via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   David Spickett via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   David Spickett via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   Harry Ramsey via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   Harry Ramsey via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   via llvm-commits
• [llvm] [VPlan] Use zext instead of sext for Index in VPDerivedIVRecipe expansion. nfc (PR #208692)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [SelectionDAG] Add computeKnownBits support for ISD::VECREDUCE_ADD (PR #207631)   Simon Pilgrim via llvm-commits
• [llvm] [InferAddressSpaces] Fix null PHI operand when an incoming flat expression is not rewritten (PR #205749)   Fujun Han via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] e3e1569 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (#208895)   via llvm-commits
• [llvm] [LegalizeTypes] Improve promotion of variable rotates. (PR #208610)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (PR #208895)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (PR #208896)   Matt Arsenault via llvm-commits
• [llvm] b4698d8 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (#208896)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (PR #208896)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (PR #208897)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [IR][NFC] Add parentheses around logical AND (PR #208512)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (PR #208897)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributorOnFunctions (PR #209103)   Antonio Frighetto via llvm-commits
• [llvm] [RISCV] Make Za64rs imply Za128rs (PR #206638)   Pengcheng Wang via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Hongyu Chen via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Hongyu Chen via llvm-commits
• [llvm] [NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (PR #208703)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] d097c2b - [IR][NFC] Add parentheses around logical AND (#208512)   via llvm-commits
• [llvm] [IR][NFC] Add parentheses around logical AND (PR #208512)   Nikolas Klauser via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributorOnFunctions (PR #209103)   Wenju He via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributor*OnFunctions (PR #209103)   Wenju He via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributor*OnFunctions (PR #209103)   Wenju He via llvm-commits
• [lld] [LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (PR #145461)   Piyou Chen via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] [SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (PR #208224)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib split vector llvm.sincos when only sin/cos veclib mappings exist (PR #194639)   Kito Cheng via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   Alexis Engelke via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   via llvm-commits
• [llvm] [VPlan] Use zext instead of sext for Index in VPDerivedIVRecipe expansion. nfc (PR #208692)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use zext instead of sext for Index in VPDerivedIVRecipe expansion. nfc (PR #208692)   Mel Chen via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Paul Osmialowski via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Pengcheng Wang via llvm-commits
• [llvm] [llvm-calc-occupancy] Add an AMDGPU occupancy calculator tool (PR #208727)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   Andreas Jonson via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   Andreas Jonson via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   Andreas Jonson via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] 95f1eab - [RISCV] Add getJumpConditionMergingParams to support branch condition merging (#206897)   via llvm-commits
• [llvm] [RISCV] Add getJumpConditionMergingParams to support branch condition merging (PR #206897)   Pengcheng Wang via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Sander de Smalen via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] CSE ExpandSCEV recipes (PR #208953)   Luke Lau via llvm-commits
• [llvm] [NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (PR #208674)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] CSE ExpandSCEV recipes (PR #208953)   Luke Lau via llvm-commits
• [clang] [llvm] Change zos-ppa1-name attr to be the name used in ppa1 (PR #208870)   Ulrich Weigand via llvm-commits
• [llvm] [VPlan] Run CSE in VPlanTransforms::optimize (PR #203370)   Luke Lau via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] f8b0713 - [NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (#208674)   via llvm-commits
• [llvm] [NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (PR #208674)   Arseniy Obolenskiy via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Add suppressions test for nested functions (PR #206962)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [RISCV][P-ext] Improve RV64 v2i16 reverse codegen (PR #208664)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Ulrich Weigand via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Alexis Engelke via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Alexis Engelke via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Alexis Engelke via llvm-commits
• [llvm] [SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (PR #207958)   Juan Manuel Martinez Caamaño via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   Victor Campos via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LowLevelType parameter from buildLoadInst (PR #208428)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   via llvm-commits
• [llvm] [LAA] Add stencil group merging to reduce runtime pointer checks (PR #187252)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Query UnrollVectorizedLoop before executing the plan (PR #208500)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (PR #208397)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [compiler-rt] [clang][CodeGen] Model vtable pointer as TBAA member of polymorphic types (PR #209053)   Gustas Janušonis via llvm-commits
• [clang] [compiler-rt] [clang][CodeGen] Model vtable pointer as TBAA member of polymorphic types (PR #209053)   via llvm-commits
• [llvm] [SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (PR #207958)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (PR #207958)   Arseniy Obolenskiy via llvm-commits
• [llvm] 19f9973 - [NFC][SPIR-V] Remove unused LowLevelType parameter from buildLoadInst (#208428)   via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LowLevelType parameter from buildLoadInst (PR #208428)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Preserve metadata on constant-mask scalarization (PR #206661)   via llvm-commits
• [llvm] [Attributor][NFC] Drop unused arg `AG` from runAttributor*OnFunctions (PR #209103)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [AMDGPU] Implement int div/rem by fp recip more efficiently (PR #204950)   via llvm-commits
• [llvm] [LV][NFC] Query UnrollVectorizedLoop before executing the plan (PR #208500)   David Green via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   via llvm-commits
• [clang] [compiler-rt] [clang][CodeGen] Model vtable pointer as TBAA member of polymorphic types (PR #209053)   Gustas Janušonis via llvm-commits
• [llvm] [GitHub] Install libedit, libxml2 and liblzma to be used in Linux LLDB builds (PR #209129)   David Spickett via llvm-commits
• [llvm] [RISCV] Don't overcost wide load in optimized segment load/store (PR #207146)   Luke Lau via llvm-commits
• [llvm] [RISCV] Don't overcost wide load in optimized segment load/store (PR #207146)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [GitHub] Install libedit, libxml2 and liblzma to be used in Linux LLDB builds (PR #209129)   via llvm-commits
• [llvm] [IR][TableGen] Add RangeSet TableGen intrinsic property (PR #203623)   Kirill Vedernikov via llvm-commits
• [llvm] [SLP] Preserve IR flags and metadata on vectorized select (PR #207982)   via llvm-commits
• [llvm] [offload][test] Add fallback to legacy AMDGPU triple library dir (PR #209131)   Robert Imschweiler via llvm-commits
• [llvm] [offload][test] Add fallback to legacy AMDGPU triple library dir (PR #209131)   via llvm-commits
• [llvm] [SLP] Preserve IR flags and metadata on vectorized select (PR #207982)   via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Ashutosh Nema via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Lucas Ramirez via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [clang][CodeGen] Model vtable pointer as TBAA member of polymorphic types (PR #209053)   Gustas Janušonis via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Add suppressions test for nested functions (PR #206962)   via llvm-commits
• [llvm] [RISCV][P-ext] Improve RV64 v2i16 reverse codegen (PR #208664)   via llvm-commits
• [llvm] [RISCV][P-ext] Improve RV64 v2i16 reverse codegen (PR #208664)   via llvm-commits
• [clang] [llvm] [X86] Add ACE v1 (AI Compute Extensions) support (PR #208408)   Arun Thangamani via llvm-commits
• [llvm] a0df86d - [RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (#209069)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (PR #209069)   Mark Zhuang via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [polly] [Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (PR #206063)   Michael Kruse via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [VPlan] Generalize usesScalars using WideInfo (NFCI) (PR #208910)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Lang Hames via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   via llvm-commits
• [llvm] [LV] Reduce register pressure of RISC-V outer loop reduction. (PR #208621)   Mel Chen via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Generalize usesScalars using WideInfo (NFCI) (PR #208910)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Generalize usesScalars using WideInfo (NFCI) (PR #208910)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Implement int div/rem by fp recip more efficiently (PR #204950)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Florian Hahn via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] cb71fef - [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (#207842)   via llvm-commits
• [llvm] [VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (PR #207842)   Florian Hahn via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [polly] 6461bd3 - [Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (#206063)   via llvm-commits
• [polly] [Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (PR #206063)   Karthika Devi C via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Add suppressions test for nested functions (PR #206962)   via llvm-commits
• [compiler-rt] 5db1f54 - compiler-rt: ubsan: Add suppressions test for nested functions (#206962)   via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Add suppressions test for nested functions (PR #206962)   via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] compiler-rt: ubsan: match suppressions against inlined frames (PR #206735)   via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   Matt Arsenault via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   Matt Arsenault via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   via llvm-commits
• [llvm] [VPlan] Generalize usesScalars using WideInfo (NFCI) (PR #208910)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [RISCV] Don't overcost wide load in optimized segment load/store (PR #207146)   via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [compiler-rt] compiler-rt: ubsan: match suppressions against inlined frames (PR #206735)   via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (PR #200751)   via llvm-commits
• [llvm] [AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (PR #200751)   via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Sander de Smalen via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Sander de Smalen via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   via llvm-commits
• [llvm] [SDAG][X86] Form pseudo fmin/fmax from select_cc (PR #208717)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Run CSE in VPlanTransforms::optimize (PR #203370)   via llvm-commits
• [llvm] 6d026ea - [AMDGPU] Remove option to disable SGPR hazard waits (#208720)   via llvm-commits
• [llvm] [AMDGPU] Remove option to disable SGPR hazard waits (PR #208720)   Carl Ritson via llvm-commits
• [llvm] Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (PR #209137)   Charles Zablit via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Lang Hames via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Kerry McLaughlin via llvm-commits
• [llvm] [SDAG][X86] Form pseudo fmin/fmax from select_cc (PR #208717)   Nikita Popov via llvm-commits
• [llvm] 13e9cc2 - [RISCV] Support spacemit vsmtvdotii extensions (#202533)   via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [RISCV] Support spacemit vsmtvdotii extensions (PR #202533)   Mark Zhuang via llvm-commits
• [llvm] [CodeGen] Expand fmaximum/fminimum reductions (PR #195169)   Simon Pilgrim via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (PR #161238)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (NFC) (PR #161238)   Ramkumar Ramachandra via llvm-commits
• [llvm] Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (PR #209137)   Charles Zablit via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] 8cb0e63 - [AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (#200751)   via llvm-commits
• [llvm] [AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (PR #200751)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Paul Osmialowski via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Florian Hahn via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Florian Hahn via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Florian Hahn via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] CSE ExpandSCEV recipes (PR #208953)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [polly] Bound ISL operations during DeLICM scalar collapsing (PR #203073)   Michael Kruse via llvm-commits
• [polly] Bound ISL operations during DeLICM scalar collapsing (PR #203073)   Michael Kruse via llvm-commits
• [polly] Bound ISL operations during DeLICM scalar collapsing (PR #203073)   Michael Kruse via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce VPlan-based hasTailFolded helper. (NFC) (PR #208329)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan-based hasTailFolded helper. (NFC) (PR #208329)   Florian Hahn via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix function suppressions for inlined code (PR #206735)   via llvm-commits
• [llvm] 6c009ff - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (#208897)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (PR #208897)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14) (PR #209117)   Matt Arsenault via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils, a reusable iteration-space loop splitter (PR #209142)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils, a reusable iteration-space loop splitter (PR #209142)   via llvm-commits
• [llvm] [orc-rt] Rename orc-executor to ogre (PR #209143)   Lang Hames via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils, a reusable iteration-space loop splitter (PR #209142)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] d76f677 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14) (#209117)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14) (PR #209117)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (PR #209118)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [clang] [flang] [lld] [lldb] [llvm] clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch (PR #206481)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SLP] Improve handling of sibling loop BTC mismatch (PR #208164)   Hari Limaye via llvm-commits
• [llvm] [SLP] Improve handling of sibling loop BTC mismatch (PR #208164)   Hari Limaye via llvm-commits
• [llvm] [orc-rt] Rename orc-executor to ogre (PR #209143)   via llvm-commits
• [llvm] [orc-rt] Rename orc-executor to ogre (PR #209143)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Gaëtan Bossu via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (PR #209144)   Łukasz Plewa via llvm-commits
• [llvm] [Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (PR #209144)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (PR #208993)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Vrukesh Panse via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   Matt Arsenault via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [orc-rt] Rename orc-executor to ogre (PR #209143)   Lang Hames via llvm-commits
• [llvm] [WebAssembly] Port SelectionDAGISel to NewPM (PR #208982)   Derek Schuff via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] efd1602 - [SCEV][NFC] Address post-merge comments on precommit test (#209094)   via llvm-commits
• [llvm] [SCEV][NFC] Address post-merge comments on precommit test (PR #209094)   Aleksandr Popov via llvm-commits
• [llvm] [AtomicExpand] Preserve AA metadata when rewriting atomic operations (PR #206418)   via llvm-commits
• [llvm] [ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (PR #203318)   LLVM Continuous Integration via llvm-commits
• [llvm] Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (PR #208453)   Alex Bradbury via llvm-commits
• [llvm] [VPlan] Generalize usesScalars using WideInfo (NFCI) (PR #208910)   via llvm-commits
• [llvm] [obj2yaml] Add Obj2Yaml ability to dump GOFF header records (PR #204194)   James Henderson via llvm-commits
• [llvm] Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (PR #208453)   Alex Bradbury via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [gn build] Port 1b879464b362 (PR #209147)   Nico Weber via llvm-commits
• [llvm] [obj2yaml] Add Obj2Yaml ability to dump GOFF header records (PR #204194)   James Henderson via llvm-commits
• [llvm] [gn build] Port 3bc47c8dc927 (PR #209148)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 640079288c5e (PR #209149)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 9b9f44d1c55c (PR #209150)   Nico Weber via llvm-commits
• [llvm] [gn build] Port c847ddf8f18d (PR #209151)   Nico Weber via llvm-commits
• [llvm] [gn build] Port d09048a46401 (PR #209152)   Nico Weber via llvm-commits
• [llvm] [gn build] Port d1dbd484ada2 (PR #209153)   Nico Weber via llvm-commits
• [llvm] [gn build] Port e6673bd03771 (PR #209154)   Nico Weber via llvm-commits
• [llvm] [gn build] Port f99f2a582e94 (PR #209155)   Nico Weber via llvm-commits
• [llvm] [gn] port cc048e80b670 more (PR #209156)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 9b9f44d1c55c (PR #209150)   via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   via llvm-commits
• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   via llvm-commits
• [llvm] a5fc1d6 - [gn] port cc048e80b670 more (#209156)   via llvm-commits
• [llvm] [gn] port cc048e80b670 more (PR #209156)   Nico Weber via llvm-commits
• [llvm] 3ae6937 - [gn build] Port 1b879464b362 (#209147)   via llvm-commits
• [llvm] [gn build] Port 1b879464b362 (PR #209147)   Nico Weber via llvm-commits
• [llvm] [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (PR #208397)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VPlan] Introduce distillation of widening semantics (NFC) (PR #196181)   via llvm-commits
• [llvm] [GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (PR #209075)   Joel Walker via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] cc11dd4 - [gn build] Port 3bc47c8dc927 (#209148)   via llvm-commits
• [llvm] [gn build] Port 3bc47c8dc927 (PR #209148)   Nico Weber via llvm-commits
• [llvm] fb05639 - [gn build] Port 640079288c5e (#209149)   via llvm-commits
• [llvm] [gn build] Port 640079288c5e (PR #209149)   Nico Weber via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [ADT] Introduce EytzingerTableSpan (PR #208885)   Nico Weber via llvm-commits
• [llvm] af30b76 - [gn build] Port 9b9f44d1c55c (#209150)   via llvm-commits
• [llvm] [gn build] Port 9b9f44d1c55c (PR #209150)   Nico Weber via llvm-commits
• [llvm] ff331ac - [gn build] Port c847ddf8f18d (#209151)   via llvm-commits
• [llvm] [gn build] Port c847ddf8f18d (PR #209151)   Nico Weber via llvm-commits
• [llvm] 6da5260 - [gn build] Port d09048a46401 (#209152)   via llvm-commits
• [llvm] [gn build] Port d09048a46401 (PR #209152)   Nico Weber via llvm-commits
• [llvm] d9a5286 - [gn build] Port d1dbd484ada2 (#209153)   via llvm-commits
• [llvm] [GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (PR #209075)   David Green via llvm-commits
• [llvm] [gn build] Port d1dbd484ada2 (PR #209153)   Nico Weber via llvm-commits
• [llvm] 4df8add - [gn build] Port e6673bd03771 (#209154)   via llvm-commits
• [llvm] [gn build] Port e6673bd03771 (PR #209154)   Nico Weber via llvm-commits
• [llvm] e2dee8e - [gn build] Port f99f2a582e94 (#209155)   via llvm-commits
• [llvm] [gn build] Port f99f2a582e94 (PR #209155)   Nico Weber via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Pankaj Dwivedi via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Karthika Devi C via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sergio Afonso via llvm-commits
• [llvm] [polly] [SCEV] Infer addrec nowrap flags during range analysis (PR #202964)   via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [AMDGPU] Remove icmp and fcmp intrinsics and builtins (PR #208183)   Jay Foad via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] OpenMP 6.0 taskgraph support (WIP) (PR #188765)   via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   via llvm-commits
• [llvm] [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (PR #208397)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Petar Avramovic via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] 477bb26 - [GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (#209075)   via llvm-commits
• [llvm] [GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (PR #209075)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (PR #209075)   via llvm-commits
• [llvm] 308393e - [LV] Allow scalable epilogue VFs matching the MainLoop VF (#208686)   via llvm-commits
• [llvm] [LV] Allow scalable epilogue VFs matching the MainLoop VF (PR #208686)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Gaëtan Bossu via llvm-commits
• [llvm] [flang-rt] Disable tests by default when cross-compiling (PR #208926)   Michael Kruse via llvm-commits
• [llvm] Revert "[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)" (PR #209162)   Nikita Popov via llvm-commits
• [llvm] 8a337c8 - Revert "[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)" (#209162)   via llvm-commits
• [llvm] Revert "[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)" (PR #209162)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (PR #207769)   Nikita Popov via llvm-commits
• [llvm] 16bd5ce - Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (#208453)   via llvm-commits
• [llvm] Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (PR #208453)   Alex Bradbury via llvm-commits
• [llvm] [Metadata] Respect volatile & atomic constraints for parallel_access MD. (PR #208839)   Michael Kruse via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (PR #207198)   Sander de Smalen via llvm-commits
• [llvm] [SLP] Preserve IR flags and metadata on vectorized select (PR #207982)   Alexey Bataev via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [orc-rt] Remove redundant [[nodiscard]] from runFinalizeActions. NFC. (PR #209163)   Lang Hames via llvm-commits
• [llvm] [Metadata] Respect volatile & atomic constraints for parallel_access MD. (PR #208839)   Florian Hahn via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   Florian Hahn via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (NFC) (PR #161238)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Bazel] Fixes 5595710 (PR #209165)   via llvm-commits
• [llvm] [orc-rt] Remove redundant [[nodiscard]] from runFinalizeActions. NFC. (PR #209163)   Lang Hames via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] [LAA] Relax HasSameSize check on couldPrevertStoreLoadForward (PR #159537)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NVPTX] Fix incorrect kill flags in ProxyRegErasure (PR #198143)   via llvm-commits
• [llvm] [SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (PR #207769)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [docs] Document `section` attribute Mach-O format (PR #209167)   Mads Marquart via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [llvm] [PAC][llvm-readobj][ELF][AArch64] Define R_AARCH64_AUTH_TLSDESC_CALL reloc (PR #199503)   Daniil Kovalev via llvm-commits
• [llvm] [NVPTX] Fix incorrect kill flags in ProxyRegErasure (PR #198143)   via llvm-commits
• [clang] [llvm] [docs] Document `section` attribute Mach-O format (PR #209167)   via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Allow +hcx to be specified as optional for Armv8.6 (PR #208019)   Jonathan Thackray via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   Matt Arsenault via llvm-commits
• [llvm] [LAA] Relax HasSameSize check on areStridedAccessesIndependent (PR #159534)   Ramkumar Ramachandra via llvm-commits
• [llvm] [orc-rt] Replace ORC_RT_NODISCARD with [[nodiscard]]. NFCI. (PR #209169)   Lang Hames via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Strengthen the isel definition of AArch64setcc_z. (PR #209170)   Paul Walker via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Strengthen the isel definition of AArch64setcc_z. (PR #209170)   via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   Nikita Popov via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [clang] [llvm] [docs] Document `section` attribute Mach-O format (PR #209167)   Mads Marquart via llvm-commits
• [clang] [llvm] [docs] Document `section` attribute Mach-O format (PR #209167)   Mads Marquart via llvm-commits
• [llvm] [LAA] Strip early HasSameSize bail in isDependent (PR #208995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Luke Lau via llvm-commits
• [llvm] [SDAG][X86] Form pseudo fmin/fmax from select_cc (PR #208717)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #203631)   Alexey Bataev via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] d4c6c86 - [SLP] Support memory runtime alias checks   via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #203631)   Alexey Bataev via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Lucas Ramirez via llvm-commits
• [llvm] [orc-rt] Replace ORC_RT_NODISCARD with [[nodiscard]]. NFCI. (PR #209169)   Lang Hames via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (PR #207769)   Nikita Popov via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #203631)   Florian Hahn via llvm-commits
• [llvm] [Metadata] Respect volatile & atomic constraints for parallel_access MD. (PR #208839)   Michael Kruse via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   via llvm-commits
• [llvm] [GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (PR #209171)   Joel Walker via llvm-commits
• [llvm] [GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (PR #209171)   via llvm-commits
• [llvm] [BitcodeReader] Lazily read and cache target triple (NFC) (PR #208175)   via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #203631)   Nikita Popov via llvm-commits
• [llvm] dc1273b - clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (#209135)   via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generalize extractSubregFromImm (PR #208765)   via llvm-commits
• [llvm] [CodeGen] Expand fmaximum/fminimum reductions (PR #195169)   Matt Arsenault via llvm-commits
• [llvm] [lit] Don't crash in _write_message when getsourcefile() returns None (PR #206957)   David Young via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #203631)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Christudasan Devadasan via llvm-commits
• [llvm] Revert "[SLP] Support memory runtime alias checks" (PR #209173)   Alexey Bataev via llvm-commits
• [llvm] a9ba4d3 - Revert "[SLP] Support memory runtime alias checks"   via llvm-commits
• [llvm] Revert "[SLP] Support memory runtime alias checks" (PR #209173)   Alexey Bataev via llvm-commits
• [llvm] da0045a - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (#209118)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (PR #209118)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (PR #209119)   Matt Arsenault via llvm-commits
• [llvm] b719e2e - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (#209119)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (PR #209119)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17) (PR #209120)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   via llvm-commits
• [llvm] Revert "[SLP] Support memory runtime alias checks" (PR #209173)   via llvm-commits
• [llvm] [Bazel] Fixes 5595710 (PR #209165)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 5595710 (PR #209165)   Aiden Grossman via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Michael Kruse via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Michael Kruse via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Michael Kruse via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [AMDGPU] Remove icmp and fcmp intrinsics and builtins (PR #208183)   Marek Olšák via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [offload][test] Add fallback to legacy AMDGPU triple library dir (PR #209131)   Matt Arsenault via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   Rito Takeuchi via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   Rito Takeuchi via llvm-commits
• [llvm] fc9a4af - [WebAssembly] Port SelectionDAGISel to NewPM   via llvm-commits
• [llvm] [WebAssembly] Port SelectionDAGISel to NewPM (PR #208982)   Aiden Grossman via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] 5251176 - [AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (#208300)   via llvm-commits
• [llvm] [AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (PR #208300)   Wooseok Lee via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support for "atomic compare capture" (PR #202315)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support for "atomic compare capture" (PR #202315)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support for "atomic compare capture" (PR #202315)   Tom Eccles via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] aab2ff0 - [SDAG][X86] Form pseudo fmin/fmax from select_cc (#208717)   via llvm-commits
• [llvm] [SDAG][X86] Form pseudo fmin/fmax from select_cc (PR #208717)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Matt Arsenault via llvm-commits
• [compiler-rt] compiler-rt: Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Matt Arsenault via llvm-commits
• [compiler-rt] compiler-rt: test: Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [DAGCombiner] Teach MatchLoadCombine to look through AND masks (PR #200247)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Matt Arsenault via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (PR #208703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (PR #208703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [orc-rt] Add ReportErrorsViaSession utility. (PR #209177)   Lang Hames via llvm-commits
• [llvm] [SCEV] Fold zext(C + X)<nsw> to sext(C) + zext(X) when X >=u |C| (PR #205926)   Aleksandr Popov via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [SystemZ] Support pseudo fmin/fmax (PR #209178)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Benjamin Maxwell via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SystemZ] Support pseudo fmin/fmax (PR #209178)   via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   Dmitry Sidorov via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
• [llvm] [SystemZ] Support pseudo fmin/fmax (PR #209178)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][SDAG] fix bitcast on ppc_f128 swapping the two halves (PR #208969)   Folkert de Vries via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] Change zos-ppa1-name attr to be the name used in ppa1 (PR #208870)   Sean Perry via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Dmitry Sidorov via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   via llvm-commits
• [llvm] [orc-rt] Add ReportErrorsViaSession utility. (PR #209177)   Lang Hames via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [LAA] Relax HasSameSize check on areStridedAccessesIndependent (PR #159534)   via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   via llvm-commits
• [llvm] [gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (PR #209181)   Nico Weber via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   Simon Pilgrim via llvm-commits
• [llvm] 4c519c6 - [gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (#209181)   via llvm-commits
• [llvm] [gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (PR #209181)   Nico Weber via llvm-commits
• [llvm] [gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (PR #209181)   via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Ralf Jung via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   Florian Hahn via llvm-commits
• [llvm] [LangRef] select: describe behavior for undef and poison (PR #208724)   Ralf Jung via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   Florian Hahn via llvm-commits
• [llvm] [LV] Extend test coverage with branch probabilities (NFC). (PR #209182)   Florian Hahn via llvm-commits
• [llvm] [LV] Extend test coverage with branch probabilities (NFC). (PR #209182)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Vedant Neve via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Paul Walker via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Hernan Ponce de Leon via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Gaëtan Bossu via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AMDGPU] Generalize extractSubregFromImm (PR #208765)   Jay Foad via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Fabian Ritter via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [polly] [Polly] - Fix infinite recursion in ScopExpander::visitAddRecExpr during parallel codegen (PR #206720)   Pawan Nirpal via llvm-commits
• [llvm] [polly] [Polly] - Fix infinite recursion in ScopExpander::visitAddRecExpr during parallel codegen (PR #206720)   Pawan Nirpal via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with crash fix (PR #208012)   Erich Keane via llvm-commits
• [compiler-rt] compiler-rt: test: Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Simon Pilgrim via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Simon Pilgrim via llvm-commits
• [llvm] [BitcodeReader] Lazily read and cache target triple (NFC) (PR #208175)   Antonio Frighetto via llvm-commits
• [llvm] [BitcodeReader] Lazily read and cache target triple (NFC) (PR #208175)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Don't bail creating interleave group if it has dead members (PR #208415)   Luke Lau via llvm-commits
• [llvm] [SystemZ][z/OS] Move emission of PPA1 (PR #208543)   Kai Nacke via llvm-commits
• [clang] [llvm] [PAC][clang] Fix ptrauth module flags behavior (PR #204226)   Daniil Kovalev via llvm-commits
• [llvm] [NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (PR #208703)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Karthika Devi C via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Ralf Jung via llvm-commits
• [clang] [llvm] [LFI][X86] Add X86 LFI target and system instruction rewrites (PR #189569)   LLVM Continuous Integration via llvm-commits
• [llvm] [LAA] Prepare to handle diff type sizes v2 (NFC) (PR #161238)   via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Ralf Jung via llvm-commits
• [llvm] [GVN] Reuse dominating PtrToInt for PtrToAddr. (PR #209164)   Nikita Popov via llvm-commits
• [llvm] [ICP] Introduce a hot function cutoff threshold for ICP (PR #208060)   Congzhe Cao via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Nick Sarnie via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   via llvm-commits
• [llvm] fb0ffb1 - [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (#207198)   via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (PR #207198)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (PR #207199)   Sander de Smalen via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   via llvm-commits
• [llvm] [SystemZ][z/OS] Move emission of PPA1 (PR #208543)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Move emission of PPA1 (PR #208543)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Move emission of PPA1 (PR #208543)   Kai Nacke via llvm-commits
• [llvm] [lit] Don't crash in _write_message when getsourcefile() returns None (PR #206957)   Aiden Grossman via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Paul Osmialowski via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] [RISCV][P-ext] Improve RV64 v2i16 reverse codegen (PR #208664)   via llvm-commits
• [llvm] [Analysis] Reuse RuntimeLibCalls.td for TargetLibraryInfo (PR #199529)   via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   zhijian lin via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [polly] [Polly] Cast delinearization terms to matching types (PR #206711)   Michael Kruse via llvm-commits
• [llvm] [Support] Forward references should be forwarded, not moved (NFC) (PR #152326)   via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [WIP][MachineScheduler] Add limit on how many AA queries we do when ading chain dependencies (PR #204715)   Nathan Corbyn via llvm-commits
• [llvm] [WIP][MachineScheduler] Add limit on how many AA queries we do when ading chain dependencies (PR #204715)   Nathan Corbyn via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction for host fallback (PR #199967)   Sairudra More via llvm-commits
• [llvm] (WIP)(RFC)[MachineScheduler] A new approach to computing memory dependencies (PR #205689)   Nathan Corbyn via llvm-commits
• [llvm] [DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (PR #201435)   Adel Ejjeh via llvm-commits
• [llvm] [DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (PR #201435)   Adel Ejjeh via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)   Gaëtan Bossu via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [clang] [llvm] Change zos-ppa1-name attr to be the name used in ppa1 (PR #208870)   Ulrich Weigand via llvm-commits
• [llvm] [ConstraintElim] Look through post-increment in header EQ/NE compare. (PR #209199)   Florian Hahn via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [ConstraintElim] Look through post-increment in header EQ/NE compare. (PR #209199)   via llvm-commits
• [llvm] [Verifier] Clarify supported storage bit width for apfloat conversions (PR #209174)   via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Łukasz Plewa via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Łukasz Plewa via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   via llvm-commits
• [llvm] [Support] Forward references should be forwarded, not moved (NFC) (PR #152326)   via llvm-commits
• [llvm] [Support] Forward references should be forwarded, not moved (NFC) (PR #152326)   via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   via llvm-commits
• [llvm] [BitcodeReader] Lazily read and cache target triple (NFC) (PR #208175)   via llvm-commits
• [llvm] [Hexagon] Fix fpround fp32 -> fp16 pattern (PR #199704)   Nicolas Miller via llvm-commits
• [llvm] [Hexagon] Add lowering for `{max,min}num` (PR #202938)   Nicolas Miller via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   Rito Takeuchi via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [libunwind] [llvm] [MC][AArch64] Add .cfi_set_ra_sign_state for PAuth_LR (PR #205442)   Jon Roelofs via llvm-commits
• [llvm] [RISCV][P-ext] Add packed saturating rounding shift codegen (PR #208630)   via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] ba61e4d - [AMDGPU] Implement int div/rem by fp recip more efficiently (#204950)   via llvm-commits
• [llvm] [AMDGPU] Implement int div/rem by fp recip more efficiently (PR #204950)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [NFC][AMDGPU] Simplify scratch address materialization in SVS frame index fallback (PR #208624)   LLVM Continuous Integration via llvm-commits
• [llvm] [Bazel] Fixes 9bf20bd (PR #209238)   Aiden Grossman via llvm-commits
• [llvm] [llvm][HTTP] Relax check for timeout error message (PR #209240)   via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Nikita Popov via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Nikita Popov via llvm-commits
• [llvm] [Bazel] Fixes 9bf20bd (PR #209238)   Jordan Rupprecht via llvm-commits
• [llvm] [llvm][HTTP] Relax check for timeout error message (PR #209240)   via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Krzysztof Drewniak via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   Yingwei Zheng via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Preserve volatile and alignment when flattening loads (PR #205759)   Akshat Dalal via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Łukasz Plewa via llvm-commits
• [llvm] [VPlan] Enable CSE of VPWidenPHIRecipe. (PR #207573)   Owen Anderson via llvm-commits
• [llvm] [VPlan] Enable CSE of VPWidenPHIRecipe. (PR #207573)   Owen Anderson via llvm-commits
• [llvm] [VPlan] Enable CSE of VPWidenPHIRecipe. (PR #207573)   Owen Anderson via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Aaron Ballman via llvm-commits
• [llvm] [VPlan] Enable CSE of VPWidenPHIRecipe. (PR #207573)   Owen Anderson via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Aiden Grossman via llvm-commits
• [llvm] [GitHub] Install libedit, libxml2 and liblzma to be used in Linux LLDB builds (PR #209129)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc][NFC] Port raw syscall users to existing syscall_wrappers (PR #208039)   Michael Jones via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Matt Arsenault via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Tom Stellard via llvm-commits
• [clang] [llvm] Replace Autoconversion with Explicit Conversion for Tagged Files (PR #206519)   Alison Zhang via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [clang] [llvm] [PAC][clang] Fix ptrauth module flags behavior (PR #204226)   Daniil Kovalev via llvm-commits
• [libc] [llvm] [AMDGPU] Fix cache files and builds after amdgcn->amdgpu conversion (PR #209247)   LLVM Continuous Integration via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Domenic Nutile via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   Sean Perry via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   Craig Topper via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   via llvm-commits
• [llvm] 54a1ef1 - [VPlan] Report PHI as opcode in getOpcodeOrIntrinsicID (#209250)   via llvm-commits
• [llvm] [VPlan] Report PHI as opcode in getOpcodeOrIntrinsicID (PR #209250)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   Sam Elliott via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [PAC][clang] Fix ptrauth module flags behavior (PR #204226)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [PAC][clang] Fix ptrauth module flags behavior (PR #204226)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU] Added Downward Propagation for the attribute "amdgpu-agpr-alloc" (PR #208847)   via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] Add intrinsics support in narrow interleave group (PR #206455)   Kamlesh Kumar via llvm-commits
• [llvm] [Bazel] Fixes 7633d1e (PR #209268)   via llvm-commits
• [llvm] [ARM] Custom Lower SetCC (PR #193841)   via llvm-commits
• [llvm] [Bazel] Fixes 7633d1e (PR #209268)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes 7633d1e (PR #209268)   Jordan Rupprecht via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   via llvm-commits
• [clang] [llvm] [AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter (PR #193087)   Daniil Kovalev via llvm-commits
• [llvm] 172464f - Revert "Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (#208413)" (#209260)   via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Usman Nadeem via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Add OffloadBlockUniformityAnalysis for offload PGO (PR #178417)   Yaxun Liu via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed saturating rounding shift codegen (PR #208630)   Craig Topper via llvm-commits
• [llvm] 3e1d5e3 - [LowerMatrixIntrinsics] Preserve volatile and alignment when flattening loads (#205759)   via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Preserve volatile and alignment when flattening loads (PR #205759)   Nikita Popov via llvm-commits
• [llvm] [libc] Add riscv64 qemu precommit CI for overlay mode. (PR #192816)   via llvm-commits
• [clang] [llvm] [AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter (PR #193087)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter (PR #193087)   Daniil Kovalev via llvm-commits
• [llvm] [PowerPC] fix `ppc_fp128` `FABS` bug (PR #209286)   Folkert de Vries via llvm-commits
• [llvm] [PowerPC] fix `ppc_fp128` `FABS` bug (PR #209286)   Folkert de Vries via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   via llvm-commits
• [llvm] [ProfileData] Remove clear() from SampleProfileFuncOffsetTable (NFC) (PR #209301)   Kazu Hirata via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   Paul Kirth via llvm-commits
• [llvm] [SystemZ][z/OS] Add z/OS archive writing support (PR #200087)   Amy Kwan via llvm-commits
• [llvm] [ProfileData] Remove clear() from SampleProfileFuncOffsetTable (NFC) (PR #209301)   via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Alexey Bataev via llvm-commits
• [llvm] [libc] Add riscv64 qemu precommit CI for overlay mode. (PR #192816)   Jeff Bailey via llvm-commits
• [clang] [flang] [lld] [lldb] [llvm] clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch (PR #206481)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [mlir] [Support] Remove virtual functions from formatv (PR #207516)   Carlos Alberto Enciso via llvm-commits
• [llvm] [ProfileData] Remove clear() from SampleProfileFuncOffsetTable (NFC) (PR #209301)   David Li via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   via llvm-commits
• [llvm] [libc] Add riscv64 qemu precommit CI for overlay mode. (PR #192816)   via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   via llvm-commits
• [llvm] [AMDGPU] Generalize extractSubregFromImm (PR #208765)   via llvm-commits
• [llvm] [AMDGPU] Added Downward Propagation for the attribute "amdgpu-agpr-alloc" (PR #208847)   via llvm-commits
• [llvm] [libc++] Add a workflow to run libc++ benchmarks on historical commits (PR #208080)   Louis Dionne via llvm-commits
• [llvm] [libc++] Add a workflow to run libc++ benchmarks on historical commits (PR #208080)   Louis Dionne via llvm-commits
• [llvm] fix partial reduce sumla expression (PR #209294)   Simon Pilgrim via llvm-commits
• [llvm] Exclude libc math C++ builtins from compiler-rt Bazel overlay (PR #208861)   Jordan Rupprecht via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Usman Nadeem via llvm-commits
• [llvm] [RISCV] Fold 26-bit frame-index offsets into Xqcilo/Xqcilia load/store/addi (PR #209315)   Garvit Gupta via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] [Object] Fix irsymtab CommonSize truncation past 4 GiB (PR #209085)   Peter Collingbourne via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Usman Nadeem via llvm-commits
• [clang] [flang] [llvm] clang: Start using new amdgpu subarch triples (PR #206482)   Matt Arsenault via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   via llvm-commits
• [llvm] [RISCV] Fold 26-bit frame-index offsets into Xqcilo/Xqcilia load/store/addi (PR #209315)   Sam Elliott via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Usman Nadeem via llvm-commits
• [llvm] [AMDGPU] Check for a live interval before querying register kind in getLiveRegs (PR #209328)   via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Usman Nadeem via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   Aiden Grossman via llvm-commits
• [llvm] [TableGen] Diagnose sub-register indices that overflow their register (PR #206346)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [SelectionDAG] Improve `CLMUL` lowering for `Promote` types wider than register width (PR #209265)   Craig Topper via llvm-commits
• [llvm] [bazel] Correct config.h definitions for musl (PR #207295)   Johan Euphrosine via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Evgenii Kudriashov via llvm-commits
• [clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)   Jon Roelofs via llvm-commits
• [llvm] [InstCombine] Fold udiv by constant into icmp and add when maximum quotient is small (PR #209321)   via llvm-commits
• [clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] Fix SplitCriticalEdge using parent valno for subrange segments (PR #208480)   via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Alexandre Isoard via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [Passes] Run LoopSimplify before SLP (PR #209332)   Hari Limaye via llvm-commits
• [llvm] [InstCombine] Fold udiv by constant into icmp and add when maximum quotient is small (PR #209321)   via llvm-commits
• [llvm] [Passes] Run LoopSimplify before SLP (PR #209332)   Hari Limaye via llvm-commits
• [llvm] [Passes] Run LoopSimplify before SLP (PR #209332)   via llvm-commits
• [llvm] [PowerPC] fix `ppc_fp128` `FABS` miscompile (PR #209286)   Folkert de Vries via llvm-commits
• [llvm] [OpenMP][AMDGPU][CI] Fix libc build (PR #209336)   Kewen Meng via llvm-commits
• [llvm] [SLP] Enable runtime stride stores (PR #200018)   Ryan Buchner via llvm-commits
• [llvm] [BOLT] Fix shifted DWARF inline-scope ranges; track scope boundaries (PR #207291)   Rafael Auler via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Mariusz Borsa via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   via llvm-commits
• [clang] [llvm] clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (PR #209135)   via llvm-commits
• [llvm] [BPF][NewPM] Introduce BPFCodeGenPassBuilder (PR #207643)   Aiden Grossman via llvm-commits
• [llvm] a718d2a - [BPF][NewPM] Introduce BPFCodeGenPassBuilder   via llvm-commits
• [llvm] [BPF][NewPM] Introduce BPFCodeGenPassBuilder (PR #207643)   Aiden Grossman via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] [BPF][NewPM] Port bpf-check-and-opt-ir (PR #207787)   Aiden Grossman via llvm-commits
• [llvm] f4d2c6e - [BPF][NewPM] Port bpf-check-and-opt-ir   via llvm-commits
• [llvm] [BPF][NewPM] Port bpf-check-and-opt-ir (PR #207787)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Fold 26-bit frame-index offsets into Xqcilo/Xqcilia load/store/addi (PR #209315)   Sudharsan Veeravalli via llvm-commits
• [llvm] [flang-rt] Disable tests by default when cross-compiling (PR #208926)   Mark Zhuang via llvm-commits
• [llvm] [orc-rt] Hoist run-alloc-actions functions, add error reporting. (PR #209356)   Lang Hames via llvm-commits
• [llvm] [flang-rt] Disable tests by default when cross-compiling (PR #208926)   Mark Zhuang via llvm-commits
• [llvm] [Hexagon] Register MachineKCFILegacy pass in LLVMInitializeHexagonTarget (PR #209245)   Sudharsan Veeravalli via llvm-commits
• [llvm] 4058610 - [Hexagon] Register MachineKCFILegacy pass in LLVMInitializeHexagonTarget (#209245)   via llvm-commits
• [llvm] [Hexagon] Register MachineKCFILegacy pass in LLVMInitializeHexagonTarget (PR #209245)   Brian Cain via llvm-commits
• [compiler-rt] [compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base (PR #206299)   Douglas Yung via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Xiaomeng Zhang via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Luke Lau via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with crash fix (PR #208012)   Erich Keane via llvm-commits
• [llvm] coro.retcon: Fix return type and buffer poisoning in elided coroutines (PR #208384)   Chuanqi Xu via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   Harrison Hao via llvm-commits
• [llvm] [LV] Reduce register pressure of RISC-V outer loop reduction. (PR #208621)   Elvis Wang via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   Harrison Hao via llvm-commits
• [llvm] e2c8fa0 - [SystemZ][z/OS] Add z/OS archive writing support (#200087)   via llvm-commits
• [llvm] [SystemZ][z/OS] Add z/OS archive writing support (PR #200087)   Amy Kwan via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [AArch64] Lower bitcast of wide <N x i1> masks without a stack spill in more cases (PR #203420)   Joe Isaacs via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Remove AMX-TF32 (PR #207673)   LLVM Continuous Integration via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [lit] Run builtin cat / diff in-process instead of spawning (PR #208024)   Prasoon Kumar via llvm-commits
• [llvm] [MIPS] Support MIPS I hard-float double loads/stores with LWC1/SWC1 (PR #209362)   via llvm-commits
• [llvm] [MIPS] Support MIPS I hard-float double loads/stores with LWC1/SWC1 (PR #209362)   via llvm-commits
• [compiler-rt] [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (PR #209359)   via llvm-commits
• [llvm] Add text file support for z/OS back in (PR #209259)   Sean Perry via llvm-commits
• [llvm] [LV] Extend test coverage with branch probabilities (NFC). (PR #209182)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Extend test coverage with branch probabilities (NFC). (PR #209182)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (PR #209359)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Luke Lau via llvm-commits
• [llvm] [Hexagon] Add lowering for `{max,min}num` (PR #202938)   Ikhlas Ajbar via llvm-commits
• [llvm] [RISCV] Add Statistics for Fusions (PR #186499)   Pengcheng Wang via llvm-commits
• [compiler-rt] [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (PR #209359)   via llvm-commits
• [compiler-rt] [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (PR #209359)   via llvm-commits
• [llvm] Improve compiler-rt build structure and export compilation info (PR #190088)   Chandler Carruth via llvm-commits
• [llvm] Improve compiler-rt build structure and export compilation info (PR #190088)   Chandler Carruth via llvm-commits
• [clang] [compiler-rt] [UBSan] Add -fsanitize=uninitialized-read check (ISO C 6.3.2.1p2) (PR #207529)   Thurston Dang via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [llvm] [TableGen] V is always a TypedInit, so use cast (PR #209208)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209097)   via llvm-commits
• [compiler-rt] [compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base (PR #206299)   Thurston Dang via llvm-commits
• [llvm] [RISCV] Add getJumpConditionMergingParams to support branch condition merging (PR #206897)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Preserve IR flags when reordering icmp/fcmp/cast through a shuffle (PR #208627)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [llvm] [ThinLTO] Error on missing ValueInfo for function definition (PR #208948)   Teresa Johnson via llvm-commits
• [llvm] [SPIR-V] Unify duplicated named MDNode lookup helper (PR #209376)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Unify duplicated named MDNode lookup helper (PR #209376)   via llvm-commits
• [llvm] 6de51be - [AArch64][GlobalISel] Legalization for bf16 fptosi/fptoui. (#209206)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalization for bf16 fptosi/fptoui. (PR #209206)   David Green via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [llvm] [Bazel] Fixes 1bd4601 (PR #209377)   via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Igor Kudrin via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Igor Kudrin via llvm-commits
• [llvm] [MachineCSE] Enhance MachineCSE simple PRE to find common subexpressi… (PR #129860)   via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with crash fix (PR #208012)   John Paul Jepko via llvm-commits
• [llvm] [LV] Support EVL for partial reduction and VPExpressionRecipe. (PR #205741)   Elvis Wang via llvm-commits
• [llvm] [LV] Support EVL for partial reduction and VPExpressionRecipe. (PR #205741)   Elvis Wang via llvm-commits
• [lld] [ELF] Synthesize STT_FILE if necessary (PR #209087)   Fangrui Song via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalization for bf16 fptosi.sat/fptoui.sat (PR #209378)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalization for bf16 fptosi.sat/fptoui.sat (PR #209378)   via llvm-commits
• [llvm] [LV] Support EVL for partial reduction and VPExpressionRecipe. (PR #205741)   Luke Lau via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [orc-rt] Add new ControllerAccess logging category. (PR #209380)   Lang Hames via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are free after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Phoebe Wang via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are free after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with computeDependence fix (PR #208012)   John Paul Jepko via llvm-commits
• [llvm] [LV] Support EVL for partial reduction and VPExpressionRecipe. (PR #205741)   Luke Lau via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are free after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [orc-rt] Add new ControllerAccess logging category. (PR #209380)   Lang Hames via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Phoebe Wang via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are free after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Phoebe Wang via llvm-commits
• [llvm] 4d5bc90 - [SelectionDAG] Improve `CLMUL` lowering for `Promote` types wider than register width (#209265)   via llvm-commits
• [llvm] [SelectionDAG] Improve `CLMUL` lowering for `Promote` types wider than register width (PR #209265)   Craig Topper via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Igor Kudrin via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [Docs] Document Qualification WG artifacts and meeting archive (PR #209382)   via llvm-commits
• [llvm] [CodeGen][NPM] Disable Machine verifier at the end of default pipelines (PR #208357)   Vikram Hegde via llvm-commits
• [llvm] [CodeGen] Split determineCalleeSaves into smaller functions. (PR #203981)   Sam Elliott via llvm-commits
• [llvm] [InstCombine] Fold sub+select abs-diff patterns with sext/zext operands (PR #209383)   Kunal Chadha via llvm-commits
• [llvm] [InstCombine] Fold sub+select abs-diff patterns with sext/zext operands (PR #209383)   via llvm-commits
• [llvm] [InstCombine] Fold sub+select abs-diff patterns with sext/zext operands (PR #209383)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] [CSKY] Add missing <map> include in CSKYTargetStreamer.h (PR #209384)   Jim Lin via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [Docs] Document Qualification WG artifacts and meeting archive (PR #209382)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] a436e36 - [AArch64][GlobalISel] Legalization for bf16 fptosi.sat/fptoui.sat (#209378)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalization for bf16 fptosi.sat/fptoui.sat (PR #209378)   David Green via llvm-commits
• [llvm] [InstCombine] Fold (1 << a) to (a + 1) and (2 >> a) to (2 - a) when a is in [0,1] (PR #207108)   Aayush Shrivastava via llvm-commits
• [llvm] f60650c - [BitcodeReader] Lazily read and cache target triple (NFC) (#208175)   via llvm-commits
• [llvm] [BitcodeReader] Lazily read and cache target triple (NFC) (PR #208175)   Antonio Frighetto via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Igor Kudrin via llvm-commits
• [llvm] [InstSimplify] Fold icmp ult/ule (A nuw+ CA), (B nuw+ CB) to true when A <=u B and CA <=u CB (PR #201485)   Aayush Shrivastava via llvm-commits
• [llvm] [InstCombine] Fold (|x| + |y|) == 0 into (x == 0) && (y == 0) (PR #200702)   Aayush Shrivastava via llvm-commits
• [llvm] [CodeGenPrepare] Don't sink icmp eq (and X, mask), 0 into return blocks (PR #200460)   Aayush Shrivastava via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [VPlan] Use VPSCEVExpander in convertToStridedAccesses (PR #208939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR] Allow vector cmpxchg (PR #209386)   Yonah Goldberg via llvm-commits
• [llvm] [VPlan] Use VPSCEVExpander in convertToStridedAccesses (PR #208939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR] Allow vector cmpxchg (PR #209386)   via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use VPSCEVExpander in convertToStridedAccesses (PR #208939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR] Allow vector cmpxchg (PR #209386)   via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [VPlan] Use VPSCEVExpander in convertToStridedAccesses (PR #208939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Kamlesh Kumar via llvm-commits
• [llvm] [LV] Support EVL for partial reduction and VPExpressionRecipe. (PR #205741)   Luke Lau via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Rename VLSU_MEM_LATENCY to Andes45VLSU_MEM_LATENCY in RISCVSchedAndes45.td (PR #209388)   Jim Lin via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Rename VLSU_MEM_LATENCY to Andes45VLSU_MEM_LATENCY in RISCVSchedAndes45.td (PR #209388)   via llvm-commits
• [llvm] [SelectionDAG] Improve `CLMUL` lowering for `Promote` types wider than register width (PR #209265)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [InlineCost] Drop Requirements around ByVal Arguments (PR #209344)   Nikita Popov via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   via llvm-commits
• [llvm] [LFI][AArch64] Add PAC support (PR #207915)   Zachary Yedidia via llvm-commits
• [llvm] [VPlan] Introduce VPIRFlags::getNWFlagsOrNone (NFC) (PR #207176)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPIRFlags::getNWFlagsOrNone (NFC) (PR #207176)   Ramkumar Ramachandra via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Luke Lau via llvm-commits
• [llvm] 317efbe - [AArch64] Fold CSET + BR_CC into a conditional branch (#207398)   via llvm-commits
• [llvm] [AArch64] Fold CSET + BR_CC into a conditional branch (PR #207398)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Luke Lau via llvm-commits
• [lld] 7049627 - [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (#209063)   via llvm-commits
• [lld] [ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (PR #209063)   Fangrui Song via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (PR #207199)   Sander de Smalen via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (PR #209088)   Hongyu Chen via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [WebAssembly] Fix operands in relaxed_pmin/relaxed_pmax pattern (PR #209398)   Nikita Popov via llvm-commits
• [llvm] 25ee70e - [WebAssembly] Fix operands in relaxed_pmin/relaxed_pmax pattern (#209398)   via llvm-commits
• [llvm] [WebAssembly] Fix operands in relaxed_pmin/relaxed_pmax pattern (PR #209398)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Jay Foad via llvm-commits
• [llvm] [lit] Run builtin cat / diff in-process instead of spawning (PR #208024)   Prasoon Kumar via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NPM] Port ImmutableModuleSummaryAnalysis to NPM (PR #203510)   Vikram Hegde via llvm-commits
• [llvm] 95349af - AMDGPU: Defer validation of target assembler directives (#207812)   via llvm-commits
• [llvm] AMDGPU: Defer validation of target assembler directives (PR #207812)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Madhur Kumar via llvm-commits
• [llvm] [WebAssembly] Use generic pseudo_fmin/pseudo_fmax opcodes (PR #208454)   Nikita Popov via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Prasoon Kumar via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] [ORC] Add LLLazyJIT destructor with call to endSession. (PR #209399)   Lang Hames via llvm-commits
• [llvm] [lit] Run builtin cat / diff in-process instead of spawning (PR #208024)   Prasoon Kumar via llvm-commits
• [llvm] [GitHub] Install libedit, libxml2 and liblzma to be used in Linux LLDB builds (PR #209129)   David Spickett via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   Evgenii Kudriashov via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Jay Foad via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Jay Foad via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Benjamin Maxwell via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Jay Foad via llvm-commits
• [llvm] Optimize register bank and info emission. (PR #208297)   Jay Foad via llvm-commits
• [llvm] [AArch64][ISel] Support i1 masked interleaved loads and stores (PR #209231)   Harry Ramsey via llvm-commits
• [llvm] [ARM][Thumb1] Consider tBfar safe in noreturn functions (PR #193240)   Simon Tatham via llvm-commits
• [llvm] [ARM][Thumb1] Consider tBfar safe in noreturn functions (PR #193240)   Simon Tatham via llvm-commits
• [llvm] [lit] Run builtin cat / diff in-process instead of spawning (PR #208024)   Prasoon Kumar via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Benjamin Maxwell via llvm-commits
• [llvm] [LangRef] select: describe behavior for undef and poison (PR #208724)   Nuno Lopes via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Lucas Ramirez via llvm-commits
• [llvm] dad3e30 - [CodeGen] Fix incorrect rematerialization rollback order (#197576)   via llvm-commits
• [llvm] [CodeGen] Fix incorrect rematerialization rollback order (PR #197576)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen][AMDGPU] Prepare rematerializer for multi-def remat support (NFC) (PR #197579)   Lucas Ramirez via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Madhur Amilkanthwar via llvm-commits
• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Nikita Popov via llvm-commits
• [llvm] afac946 - [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (#208225)   via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   Matt Arsenault via llvm-commits
• [llvm] [orc-rt] Add ORC_RT_LOG_PUB_S for logging runtime strings. (PR #209401)   Lang Hames via llvm-commits
• [llvm] [MIPS] Support MIPS I hard-float double loads/stores with LWC1/SWC1 (PR #209362)   via llvm-commits
• [llvm] [VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC). (PR #203386)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Look through post-increment in header EQ/NE compare. (PR #209199)   Florian Hahn via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Florian Hahn via llvm-commits
• [llvm] [CSKY] Fix build without PCH (PR #209405)   Nikita Popov via llvm-commits
• [llvm] c9610ac - [CSKY] Fix build without PCH (#209405)   via llvm-commits
• [llvm] [CSKY] Fix build without PCH (PR #209405)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (PR #208225)   via llvm-commits
• [llvm] [AMDGPU] Add dynamic threshold for DPP atomic optimizer on integer LDS atomics (PR #186762)   via llvm-commits
• [llvm] [WebAssembly] Fix operands in relaxed_pmin/relaxed_pmax pattern (PR #209398)   Derek Schuff via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Matt Arsenault via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: skip copies for AGPR-compatible users (PR #209204)   Romanov Vlad via llvm-commits
• [llvm] [Docs] Document Qualification WG artifacts and meeting archive (PR #209382)   via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   via llvm-commits
• [llvm] [Bazel] Fixes 1bd4601 (PR #209377)   Benjamin Kramer via llvm-commits
• [llvm] [Bazel] Fixes 1bd4601 (PR #209377)   Benjamin Kramer via llvm-commits
• [llvm] [SDAG] emit error when `llvm.type.checked.load` is not lowered (PR #208058)   Matt Arsenault via llvm-commits
• [llvm] 7c15144 - [SDAG] emit error when `llvm.type.checked.load` is not lowered (#208058)   via llvm-commits
• [llvm] [SDAG] emit error when `llvm.type.checked.load` is not lowered (PR #208058)   Matt Arsenault via llvm-commits
• [llvm] [SCEVDivision] Add assertion to check operand types match (NFCI) (PR #204146)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Support global address in V/S_MOV_B64 lowering (PR #203527)   Matt Arsenault via llvm-commits
• [llvm] a31c941 - [AMDGPU] Support global address in V/S_MOV_B64 lowering (#203527)   via llvm-commits
• [llvm] [AMDGPU] Support global address in V/S_MOV_B64 lowering (PR #203527)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] d21d602 - [NPM] Port ImmutableModuleSummaryAnalysis to NPM (#203510)   via llvm-commits
• [llvm] [NPM] Port ImmutableModuleSummaryAnalysis to NPM (PR #203510)   Vikram Hegde via llvm-commits
• [llvm] [NPM] Make few more passes required (PR #203511)   Vikram Hegde via llvm-commits
• [llvm] [X86] Truncates i64 add arithmetic to i32 when known zeroes in upper 33 bits (PR #191619)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Freeze condition in select of load fold (PR #208683)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   Simon Pilgrim via llvm-commits
• [llvm] [lit] Add configurable slowest-test limit to --time-tests (PR #208444)   Manuel Carrasco via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (PR #209407)   Matt Arsenault via llvm-commits
• [clang] [llvm] Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (PR #209407)   Matt Arsenault via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17) (PR #209120)   Fabian Ritter via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (PR #209407)   via llvm-commits
• [llvm] 6a1f23a - [NPM] Make few more passes required (#203511)   via llvm-commits
• [llvm] [NPM] Make few more passes required (PR #203511)   Vikram Hegde via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] 37d488f - [ConstraintElim] Look through post-increment in header EQ/NE compare. (#209199)   via llvm-commits
• [llvm] [ConstraintElim] Look through post-increment in header EQ/NE compare. (PR #209199)   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Fix fpround fp32 -> fp16 pattern (PR #199704)   Nicolas Miller via llvm-commits
• [llvm] add `frexp`/`ldexp` expansion in `ExpandIrInsts` (PR #208556)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (PR #208993)   Ramkumar Ramachandra via llvm-commits
• [llvm] add `frexp`/`ldexp` expansion in `ExpandIrInsts` (PR #208556)   Matt Arsenault via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (PR #209137)   Charles Zablit via llvm-commits
• [llvm] 922b1a9 - Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (#209137)   via llvm-commits
• [llvm] Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (PR #209137)   Charles Zablit via llvm-commits
• [llvm] add1925 - [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (#207199)   via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (PR #207199)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] add `frexp`/`ldexp` expansion in `ExpandIrInsts` (PR #208556)   Matt Arsenault via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   David Green via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (PR #208993)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LangRef] select: describe behavior for undef and poison (PR #208724)   Ralf Jung via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   Alexis Engelke via llvm-commits
• [llvm] dbbd4e0 - [LangRef] select: describe behavior for undef and poison (#208724)   via llvm-commits
• [llvm] [LangRef] select: describe behavior for undef and poison (PR #208724)   Ralf Jung via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   Alexis Engelke via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] add `frexp`/`ldexp` expansion in `ExpandIrInsts` (PR #208556)   Folkert de Vries via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   Lucas Ramirez via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (PR #207199)   LLVM Continuous Integration via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [llvm] [AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (PR #207199)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Remove icmp and fcmp intrinsics and builtins (PR #208183)   Jay Foad via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Momchil Velikov via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Jay Foad via llvm-commits
• [clang] [llvm] Disable pre-link LTO vectorisation and loop unroll (PR #195886)   Momchil Velikov via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Mateusz Chudyk via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Mateusz Chudyk via llvm-commits
• [llvm] [CodeGen] Fix SplitCriticalEdge using parent valno for subrange segments (PR #208480)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] aa59606 - Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (#209407)   via llvm-commits
• [clang] [llvm] Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (PR #209407)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Luke Lau via llvm-commits
• [llvm] add `frexp`/`ldexp` expansion in `ExpandIrInsts` (PR #208556)   Folkert de Vries via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Refactor eliminateSpillageCopies (PR #208210)   Jack Styles via llvm-commits
• [llvm] [SCEVDivision] Add assertion to check operand types match (NFCI) (PR #204146)   Ryotaro Kasuga via llvm-commits
• [llvm] f6393d6 - [lit] Add configurable slowest-test limit to --time-tests (#208444)   via llvm-commits
• [llvm] [lit] Add configurable slowest-test limit to --time-tests (PR #208444)   Manuel Carrasco via llvm-commits
• [llvm] [PassBuilder] Remove LoopFullUnrollPass from before LoopVectorize in the FullLTO pipeline (PR #197176)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Mateusz Chudyk via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Allow SCC-only implicit defs and mark SOP2 SALU as rematerializable (PR #187084)   Jay Foad via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Mateusz Chudyk via llvm-commits
• [llvm] [AArch64] Fixup possibly unused variable warning after #207199 (PR #209418)   Sander de Smalen via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fixup possibly unused variable warning after #207199 (PR #209418)   via llvm-commits
• [llvm] [AArch64] Fixup possibly unused variable warning after #207199 (PR #209418)   Benjamin Maxwell via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Luke Lau via llvm-commits
• [llvm] [Docs] Document Qualification WG artifacts and meeting archive (PR #209382)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [CycleInfo] Store blocks using Euler tour representation (PR #208614)   Alexis Engelke via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Simon Pilgrim via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [CodeGen][AMDGPU] Prepare rematerializer for multi-def remat support (NFC) (PR #197579)   Lucas Ramirez via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Break false dependencies on Zen 4 and 5 (#206849) (PR #207079)   via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Charles Zablit via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   via llvm-commits
• [llvm] [SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (PR #208977)   Paul Walker via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   Matt Arsenault via llvm-commits
• [lld] [llvm] WIP - [DTLTO] Speed up temporary file removal "2" (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   Jay Foad via llvm-commits
• [llvm] [RISCV][P-ext] Add packed saturating rounding shift codegen (PR #208630)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [GlobalISel] Improve bf16 converts with fast-math flags. (PR #200741)   Jay Foad via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Alexis Engelke via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   via llvm-commits
• [llvm] 1a8e5b6 - [X86] Add tuning features for Hygon C86-4G-M7 (#205992)   via llvm-commits
• [llvm] [X86] Add tuning features for Hygon C86-4G-M7 (PR #205992)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add test for convertToStridedAccess flag issue. NFC (PR #209425)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add test for convertToStridedAccess flag issue. NFC (PR #209425)   via llvm-commits
• [llvm] f2ada6d - [VPlan] Add test for convertToStridedAccess flag issue. NFC (#209425)   via llvm-commits
• [llvm] [VPlan] Add test for convertToStridedAccess flag issue. NFC (PR #209425)   Luke Lau via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for hadd family of intrinsics (PR #163985)   Jay Foad via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   Evgenii Kudriashov via llvm-commits
• [llvm] [offload] Decouple PluginManager from the OpenMP offload policy handling (PR #208113)   Ivan R. Ivanov via llvm-commits
• [llvm] [offload] Decouple PluginManager from the OpenMP offload policy handling (PR #208113)   Ivan R. Ivanov via llvm-commits
• [llvm] [offload] Decouple PluginManager from the OpenMP offload policy handling (PR #208113)   Ivan R. Ivanov via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Benjamin Maxwell via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   Evgenii Kudriashov via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   via llvm-commits
• [llvm] [offload] Decouple PluginManager from the OpenMP offload policy handling (PR #208113)   Ivan R. Ivanov via llvm-commits
• [llvm] [offload] Decouple PluginManager from the OpenMP offload policy handling (PR #208113)   Ivan R. Ivanov via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Kerry McLaughlin via llvm-commits
• [llvm] 95e647c - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17) (#209120)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17) (PR #209120)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18) (PR #209121)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18) (PR #209121)   Matt Arsenault via llvm-commits
• [llvm] [orc-rt] Add ORC_RT_LOG_PUB_S for logging runtime strings. (PR #209401)   Lang Hames via llvm-commits
• [llvm] [SCEVDivision] Add assertion to check operand types match (NFCI) (PR #204146)   Nikita Popov via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for hadd family of intrinsics (PR #163985)   David Green via llvm-commits
• [llvm] e793eee - [ORC] Add LLLazyJIT destructor with call to endSession. (#209399)   via llvm-commits
• [llvm] [ORC] Add LLLazyJIT destructor with call to endSession. (PR #209399)   Lang Hames via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] [PassBuilder] Remove LoopFullUnrollPass from before LoopVectorize in the FullLTO pipeline (PR #197176)   Nikita Popov via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Alexis Engelke via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   via llvm-commits
• [llvm] [SystemZ] Support pseudo fmin/fmax (PR #209178)   Nikita Popov via llvm-commits
• [llvm] 2a6cc99 - [SystemZ] Support pseudo fmin/fmax (#209178)   via llvm-commits
• [llvm] [SystemZ] Support pseudo fmin/fmax (PR #209178)   Nikita Popov via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [ORC] Add LLLazyJIT destructor with call to endSession. (PR #209399)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #186972)   Henry Linjamäki via llvm-commits
• [llvm] [SelectionDAG] Update MemOp to distinguish memmove from memcpy (PR #206005)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Strengthen the isel definition of AArch64setcc_z. (PR #209170)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-r… (PR #208657)   David Green via llvm-commits
• [llvm] c1ae9ea - [AArch64] Fixup possibly unused variable warning after #207199 (#209418)   via llvm-commits
• [llvm] [AArch64] Fixup possibly unused variable warning after #207199 (PR #209418)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Add support for strict_pseudo_fmin/fmax (PR #209434)   via llvm-commits
• [llvm] [VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (PR #209132)   Ramkumar Ramachandra via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Karthika Devi C via llvm-commits
• [llvm] 64de40e - [CodeGen][AMDGPU] Prepare rematerializer for multi-def remat support (NFC) (#197579)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] Prepare rematerializer for multi-def remat support (NFC) (PR #197579)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Fine-grained LIS updates on remat and dead-def handling (PR #202673)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   via llvm-commits
• [llvm] 9582f71 - [UnwinderV3] Include padding in spliting calculations (#208458)   via llvm-commits
• [llvm] [UnwinderV3] Include padding in spliting calculations (PR #208458)   Evgenii Kudriashov via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   Uday Kiriti via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #186972)   Henry Linjamäki via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [llvm] [SCEVDivision] Add assertion to check operand types match (NFCI) (PR #204146)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] 24c3eaa - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18) (#209121)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18) (PR #209121)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (PR #209122)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (PR #209122)   Matt Arsenault via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Karthika Devi C via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Edd Dawson via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Edd Dawson via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Edd Dawson via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Karthika Devi C via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #186972)   Henry Linjamäki via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] [AMDGPU] Factor MFMA-form copy analysis into shared copy-plan analysis (PR #209438)   via llvm-commits
• [llvm] 23a32bc - [SCEVDivision] Remove unnecessary integer casts (NFCI) (#208155)   via llvm-commits
• [llvm] [SCEVDivision] Remove unnecessary integer casts (NFCI) (PR #208155)   Ryotaro Kasuga via llvm-commits
• [llvm] [Object][GOFF] Recognize RLD and LEN records (PR #207118)   Amy Kwan via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   via llvm-commits
• [llvm] [Object][GOFF] Recognize RLD and LEN records (PR #207118)   Amy Kwan via llvm-commits
• [llvm] [CodeGen] Fine-grained LIS updates on remat and dead-def handling (PR #202673)   Lucas Ramirez via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   Paul Walker via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Matt Arsenault via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   Mingjie Xu via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (PR #209171)   David Green via llvm-commits
• [llvm] 48636d1 - [GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (#209171)   via llvm-commits
• [llvm] [GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (PR #209171)   David Green via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   Paul Walker via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #208413)   Emery Conrad via llvm-commits
• [llvm] cba0124 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (#209122)   via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Eugene Epshteyn via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (PR #209122)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (20) (PR #209211)   Matt Arsenault via llvm-commits
• [llvm] b4b19c8 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (20) (#209211)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (20) (PR #209211)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (21) (PR #209212)   Matt Arsenault via llvm-commits
• [polly] 5d5dd83 - [Passes] Replace OptimizationLevel with an enum (#209424)   via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   Alexis Engelke via llvm-commits
• [llvm] 5d5dd83 - [Passes] Replace OptimizationLevel with an enum (#209424)   via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Alexis Engelke via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Paul Walker via llvm-commits
• [llvm] [flang-rt] Disable tests by default when cross-compiling (PR #208926)   Michael Kruse via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Paul Walker via llvm-commits
• [llvm] [SCEVDivision] Remove unnecessary integer casts (NFCI) (PR #208155)   LLVM Continuous Integration via llvm-commits
• [llvm] 42d52df - [SelectionDAG] Update MemOp to distinguish memmove from memcpy (#206005)   via llvm-commits
• [llvm] [SelectionDAG] Update MemOp to distinguish memmove from memcpy (PR #206005)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [Bazel] Fixes 16094a8 (PR #209435)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes 16094a8 (PR #209435)   Jordan Rupprecht via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] 2698209 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (21) (#209212)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (21) (PR #209212)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (22) (PR #209213)   Matt Arsenault via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [llvm] bf08633 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (22) (#209213)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (22) (PR #209213)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (23) (PR #209214)   Matt Arsenault via llvm-commits
• [llvm] 6e515cd - [lldb][Windows] add release notes for lldb-server (#209415)   via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Outline LSP payload decode errors (PR #203121)   Aleksandr Platonov via llvm-commits
• [llvm] [ORC] Add AutoImportGenerator for COFF dllimport auto-import (PR #203914)   via llvm-commits
• [llvm] [JITLink][ORC] Add ppc64 to generic stub API; use it in DLLImportDefinitionGenerator (PR #207968)   via llvm-commits
• [llvm] [ORC] Add opt-in per-JITDylib colocating slab allocator (PR #207970)   via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Dmitry Sidorov via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [AMDGPU] Generalize extractSubregFromImm (PR #208765)   Jay Foad via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   via llvm-commits
• [llvm] [AMDGPU] Generalize extractSubregFromImm (PR #208765)   Jay Foad via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Paul Walker via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Paul Walker via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Paul Walker via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Outline LSP payload decode errors (PR #203121)   Aleksandr Platonov via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [lldb][bazel] Generate SafeAutoloadPaths.inc in the Bazel overlay (PR #209454)   David Young via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   via llvm-commits
• [llvm] [lldb][bazel] Generate SafeAutoloadPaths.inc in the Bazel overlay (PR #209454)   David Young via llvm-commits
• [llvm] [lldb][Windows] add release notes for the Python private API removal (PR #209456)   Charles Zablit via llvm-commits
• [llvm] [lldb][Windows] add release notes for lldb-server (PR #209415)   Charles Zablit via llvm-commits
• [llvm] [libc][bazel] Add recently added sys/socket functions and syscall wrappers (PR #209457)   Pavel Labath via llvm-commits
• [llvm] [libc][bazel] Add recently added sys/socket functions and syscall wrappers (PR #209457)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Benjamin Maxwell via llvm-commits
• [llvm] [libc][bazel] Add recently added sys/socket functions and syscall wrappers (PR #209457)   Jordan Rupprecht via llvm-commits
• [llvm] [TableGen] Short-circuit !cond operator (PR #208942)   Jay Foad via llvm-commits
• [llvm] [LV] Add test showing incorrect trip count materialization (NFC) (PR #209460)   Florian Hahn via llvm-commits
• [llvm] [flang-rt] Disable tests by default when cross-compiling (PR #208926)   Mark Zhuang via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Benjamin Maxwell via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [X86][GlobalIsel] Support G_BUILD_VECTOR for non constant using G_INSERT_VECTOR_ELT (PR #204078)   via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Benjamin Maxwell via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Kerry McLaughlin via llvm-commits
• [llvm] [lldb][Windows] add release notes for the Python private API removal (PR #209456)   via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [openmp] [offload][OpenMP] Add atomic cross-team reductions (PR #209298)   Robert Imschweiler via llvm-commits
• [lld] [llvm] [DTLTO] terminology - use extraction rather than serialization (PR #208468)   Ben Dunbobbin via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   David Green via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   David Green via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   David Green via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sergio Afonso via llvm-commits
• [clang] [llvm] [openmp] [offload][OpenMP] Add atomic cross-team reductions (PR #209298)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [openmp] [offload][OpenMP] Add atomic cross-team reductions (PR #209298)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add `llvm.dynamicshuffle` intrinsic for vector shuffles with runtime masks (PR #208537)   Oscar Smith via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Jay Foad via llvm-commits
• [llvm] [Support] Add LLVM_WINDOWS_AVOID_SHELL32_APIS for shell32-free path lookups (PR #209448)   Aaron Ballman via llvm-commits
• [llvm] [X86][GISEL] - Legalize G_FPTOUI & G_UITOFP for X87 (PR #155562)   Pawan Nirpal via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209463)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209463)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209463)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [Gisel] smin/umin optimization rewrites (PR #203939)   Luisa Cicolini via llvm-commits
• [llvm] [Gisel] smin/umin optimization rewrites (PR #203939)   Luisa Cicolini via llvm-commits
• [llvm] [Gisel] smin/umin optimization rewrites (PR #203939)   Luisa Cicolini via llvm-commits
• [llvm] [Gisel] smin/umin optimization rewrites (PR #203939)   Luisa Cicolini via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Jay Foad via llvm-commits
• [llvm] [Gisel] smin/umin optimization rewrites (PR #203939)   Luisa Cicolini via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   via llvm-commits
• [llvm] [AArch64][LV] Cost low-VF interleaved access (PR #205844)   Jacob Crawley via llvm-commits
• [llvm] [AArch64][LV] Cost low-VF interleaved access (PR #205844)   Jacob Crawley via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Jay Foad via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [polly] [Passes] Replace OptimizationLevel with an enum (PR #209424)   Paul Osmialowski via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Ricardo Jesus via llvm-commits
• [llvm] [IR] Make semantics of strictfp consistent (PR #209465)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [llvm] [orc-rt] Add ORC_RT_UNREACHABLE / ORC_RT_BUILTIN_UNREACHABLE (PR #209466)   Lang Hames via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] GCNRewritePartialRegUses - missing superreg (PR #208718)   Jay Foad via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Make semantics of strictfp consistent (PR #209465)   via llvm-commits
• [llvm] [IR] Make semantics of strictfp consistent (PR #209465)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Use BMM for bitreverse without GFNI (PR #209223)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Add support for strict_pseudo_fmin/fmax (PR #209434)   Ulrich Weigand via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Utkarsh Saxena via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Utkarsh Saxena via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Utkarsh Saxena via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Luke Lau via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Add patterns for selecing dec from sub (PR #209467)   John Brawn via llvm-commits
• [llvm] [AArch64] Add patterns for selecing dec from sub (PR #209467)   via llvm-commits
• [llvm] Revert "[CMake] Use minimum python version of 3.8 everywhere" (PR #209233)   Aiden Grossman via llvm-commits
• [llvm] [orc-rt] Add ORC_RT_UNREACHABLE / ORC_RT_BUILTIN_UNREACHABLE (PR #209466)   Lang Hames via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Ramkumar Ramachandra via llvm-commits
• [llvm] [orc-rt] Add ORC_RT_UNREACHABLE / ORC_RT_BUILTIN_UNREACHABLE (PR #209466)   Lang Hames via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   via llvm-commits
• [llvm] [orc-rt] Sort unit test sources in CMakeLists.txt. NFC. (PR #209470)   Lang Hames via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Antonio Frighetto via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] GCNRewritePartialRegUses - missing superreg (PR #208718)   Jay Foad via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Antonio Frighetto via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with computeDependence fix (PR #208012)   Erich Keane via llvm-commits
• [llvm] [AMDGPU] Support global address in V/S_MOV_B64 lowering (PR #203527)   Jay Foad via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   Charles Zablit via llvm-commits
• [llvm] [orc-rt] Sort unit test sources in CMakeLists.txt. NFC. (PR #209470)   Lang Hames via llvm-commits
• [llvm] b26c417 - [InlineCost] Drop Requirements around ByVal Arguments   via llvm-commits
• [llvm] [InlineCost] Drop Requirements around ByVal Arguments (PR #209344)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Matthew Devereau via llvm-commits
• [llvm] [AlwaysInliner] Do not inline on attribute mismatches (PR #209345)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] 37b8e76 - [AlwaysInliner] Do not inline on attribute mismatches   via llvm-commits
• [llvm] [AlwaysInliner] Do not inline on attribute mismatches (PR #209345)   Aiden Grossman via llvm-commits
• [llvm] fb423ba - [ThinLTO] Error on missing ValueInfo for function definition   via llvm-commits
• [llvm] [ThinLTO] Error on missing ValueInfo for function definition (PR #208948)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Paul Walker via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   Douglas Yung via llvm-commits
• [lld] 6af0a79 - Bump version to 24.0.0git (#209473)   via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   Douglas Yung via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Paul Walker via llvm-commits
• [llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)   via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [llvm] aefba88 - [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (#209452)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (PR #209452)   Paul Walker via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Joel Walker via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Joel Walker via llvm-commits
• [llvm] [orc-rt] Move ErrorTest death tests to an ErrorDeathTest suite. (PR #209476)   Lang Hames via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage (PR #207974)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   David Green via llvm-commits
• [llvm] [mlir] [IR] Make semantics of strictfp consistent (PR #209465)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [libc] Add riscv64 qemu precommit CI for overlay mode. (PR #192816)   Mikhail R. Gadelha via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   Pawan Nirpal via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Joel Walker via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Joel Walker via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] c5022b5 - [SystemZ] Add support for strict_pseudo_fmin/fmax (#209434)   via llvm-commits
• [llvm] [SystemZ] Add support for strict_pseudo_fmin/fmax (PR #209434)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Luke Lau via llvm-commits
• [llvm] 6d12cf1 - Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (#209414)   via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   David Green via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [Support] Preserve tilde paths when home lookup fails (PR #209479)   via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] [Support] Preserve tilde paths when home lookup fails (PR #209479)   via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] b1a6a90 - [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (#208392)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   Simon Pilgrim via llvm-commits
• [llvm] [Support] Preserve tilde paths when home lookup fails (PR #209479)   via llvm-commits
• [llvm] [Support] Preserve tilde paths when home lookup fails (PR #209479)   via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Zihao Wang via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   Pawan Nirpal via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Zihao Wang via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Antonio Frighetto via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Antonio Frighetto via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Antonio Frighetto via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [llvm] [Passes] Run LoopSimplify before SLP (PR #209332)   David Green via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [KnownBits] Use min non-zero divisor and quotient lower bound in udiv (PR #209360)   Jay Foad via llvm-commits
• [llvm] [SLP]Add umax/umin/smax/smin as main opcodes for copyables (PR #209326)   Alexey Bataev via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [Support] Preserve tilde paths when home lookup fails (PR #209479)   via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Dmitry Sidorov via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Fix Fortran automap handling (PR #162501)   via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Dmitry Sidorov via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   David Green via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Utkarsh Saxena via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Utkarsh Saxena via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Evgenii Kudriashov via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Joseph Huber via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] [SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (PR #203661)   Dmitry Sidorov via llvm-commits
• [llvm] [orc-rt] Move ErrorTest death tests to an ErrorDeathTest suite. (PR #209476)   Lang Hames via llvm-commits
• [llvm] [DRAFT][Runtimes] Don't execute flang during the runtimes configure step (PR #205458)   Michael Kruse via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [lldb][Windows] add release notes for the Python private API removal (PR #209456)   Charles Zablit via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   Pawan Nirpal via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   Pawan Nirpal via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Charles Zablit via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Charles Zablit via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   Kerry McLaughlin via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Aiden Grossman via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Aiden Grossman via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Aiden Grossman via llvm-commits
• [llvm] [SLP]Do not blacklist ordered-reduction operands on failed root attempt (PR #208511)   Alexey Bataev via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [docker][Windows] install libxml2 using vcpkg (PR #209422)   Charles Zablit via llvm-commits
• [llvm] 1b10cd9 - [SLP]Do not blacklist ordered-reduction operands on failed root attempt   via llvm-commits
• [llvm] [SLP]Do not blacklist ordered-reduction operands on failed root attempt (PR #208511)   Alexey Bataev via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] Apply fixes from bugprone-container-bounds-check-overflow check (PR #206484)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (23) (PR #209214)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   via llvm-commits
• [llvm] [Arch64] Add widening for vector interleave (2/n) (PR #209490)   Kamlesh Kumar via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent (PR #209465)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIR-V] Parse parameterized Memory Access operands with a shared helper (PR #209262)   Arseniy Obolenskiy via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [orc-rt] Make noDispatch test helper fail in -Asserts builds. (PR #209493)   Lang Hames via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ehsan Amiri via llvm-commits
• [compiler-rt] db63c56 - [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (#209359)   via llvm-commits
• [compiler-rt] [ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (PR #209359)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPARC] Keep absolute hi/lo relocations direct (PR #208553)   Jessica Clarke via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (PR #209414)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (PR #207768)   Diego Novillo via llvm-commits
• [llvm] [SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (PR #207768)   Diego Novillo via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [SPARC] Support the .seg directive (PR #209001)   Jessica Clarke via llvm-commits
• [llvm] 53da348 - [LV] Add test showing incorrect trip count materialization (NFC) (#209460)   via llvm-commits
• [llvm] [LV] Add test showing incorrect trip count materialization (NFC) (PR #209460)   Florian Hahn via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ehsan Amiri via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [AlwaysInliner] Do not inline on attribute mismatches (PR #209345)   Carlos Seo via llvm-commits
• [llvm] Revert "[AlwaysInliner] Do not inline on attribute mismatches" (PR #209497)   Aiden Grossman via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [PowerPC]Avoid combine to ADDC i8 or ADDC i16 for PPCTargetLowering::combineSignExtendSetCC (PR #199733)   zhijian lin via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   Pawan Nirpal via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   via llvm-commits
• [llvm] [lldb][bazel] Add the lldb-mcp binary to the Bazel overlay (PR #209498)   David Young via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [Arch64] Add widening for vector interleave (2/n) (PR #209490)   Kamlesh Kumar via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   David Spickett via llvm-commits
• [llvm] [libc] Add riscv64 qemu precommit CI for overlay mode. (PR #192816)   via llvm-commits
• [llvm] [lit] Remove most external shell test coverage (PR #209500)   Aiden Grossman via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   David Spickett via llvm-commits
• [llvm] [AlwaysInliner] Do not inline on attribute mismatches (PR #209345)   Nikita Popov via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [SelectionDAG] Improve shifted range checks with add offsets (PR #207955)   via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Yingwei Zheng via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   via llvm-commits
• [llvm] 0a5793b - [InstCombine] Preserve IR flags when reordering icmp/fcmp/cast through a shuffle (#208627)   via llvm-commits
• [llvm] [InstCombine] Preserve IR flags when reordering icmp/fcmp/cast through a shuffle (PR #208627)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Use VPlan::hasTailFolded in materializeConstantVectorTC. (PR #209502)   Florian Hahn via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent (PR #209465)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64] Add patterns for selecting dec from sub (PR #209467)   John Brawn via llvm-commits
• [clang] [llvm] [AMDGPU] Remove icmp and fcmp intrinsics (PR #208183)   Jay Foad via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [compiler-rt] compiler-rt: ubsan: Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [compiler-rt] [compiler-rt][ubsan] Fix suppressions for inlined functions (PR #206735)   via llvm-commits
• [llvm] [Support] Add LLVM_WINDOWS_AVOID_SHELL32_APIS for shell32-free path lookups (PR #209448)   Saleem Abdulrasool via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Fix Fortran automap handling (PR #162501)   Akash Banerjee via llvm-commits
• [llvm] [llvm-reduce] Avoid invalid replacements with x86_amx type (PR #209506)   Nikita Popov via llvm-commits
• [llvm] 8b7b61f - [llvm-reduce] Avoid invalid replacements with x86_amx type (#209506)   via llvm-commits
• [llvm] [DAGCombiner] Fold extract_vector(get_active_lane_mask(), 0) to get_active_lane_mask (PR #208978)   Usman Nadeem via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - enable shuffle combining of concat(extractsub(shuffle),extractsub(shuffle)) patterns (PR #209510)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent (PR #209465)   Ramkumar Ramachandra via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   via llvm-commits
• [llvm] ✨[AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   David Green via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [lldb] [llvm] [lldb] Add release note for SymStore and generate settings docs (PR #209469)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (PR #209172)   Florian Hahn via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Craig Topper via llvm-commits
• [llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)   Usman Nadeem via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Craig Topper via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][CodeGen] Pre-commit test for gfx1250 Setreg hazard violation (PR #209524)   Lucas Ramirez via llvm-commits
• [llvm] Revert "[AlwaysInliner] Do not inline on attribute mismatches" (PR #209497)   via llvm-commits
• [llvm] [Arch64] Add widening for vector interleave (2/n) (PR #209490)   via llvm-commits
• [llvm] [ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (PR #209478)   via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] Fix test that had a check embedded which depended on the current LLVM version number. (PR #209530)   Douglas Yung via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [llvm] [IR] Allow vector cmpxchg (PR #209386)   Yonah Goldberg via llvm-commits
• [llvm] Fix test that had a check embedded which depended on the current LLVM version number. (PR #209530)   Douglas Yung via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   via llvm-commits
• [llvm] 1a072b5 - Fix test that had a check embedded which depended on the current LLVM version number. (#209530)   via llvm-commits
• [llvm] Fix test that had a check embedded which depended on the current LLVM version number. (PR #209530)   Douglas Yung via llvm-commits
• [clang] [llvm] [ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (PR #209300)   Gábor Horváth via llvm-commits
• [llvm] [PowerPC] Fix wrteei crash: use u1imm instead of i1imm (PR #188558)   Lei Huang via llvm-commits
• [compiler-rt] [compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base (PR #206299)   Thurston Dang via llvm-commits
• [flang] [llvm] [mlir] [mlir][openacc] Remove OpenACCToLLVMIRTranslation (PR #209295)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [IndVarSimplify] Skip exit predication past divergent effects (#183906) (PR #194202)   Eli Friedman via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (24) (PR #209485)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent (PR #209465)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (24) (PR #209485)   Matt Arsenault via llvm-commits
• [llvm] 4697832 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (24) (#209485)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (24) (PR #209485)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (25) (PR #209486)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Lower target in_reduction (PR #199967)   Sairudra More via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   via llvm-commits
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• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
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• [libc] [llvm] [libc][math] Implement single-precision erfcf (PR #190061)   via llvm-commits
• [llvm] 3ba1b70 - [AMDGPU][CodeGen] Fix `S_NOP` insertion during `S_SET_VGPR_MSB` placement (#209525)   via llvm-commits
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• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
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• [llvm] [AMDGPU] GCNRewritePartialRegUses - missing superreg (PR #208718)   Matt Arsenault via llvm-commits
• [llvm] [ConstraintElim] Transfer SLE facts to unsigned (PR #209623)   via llvm-commits
• [llvm] [GlobalISel] Legalize wide-memory extending loads via load + extension (PR #206276)   Ilpo Ruotsalainen via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   David Green via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   David Green via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   David Green via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Craig Topper via llvm-commits
• [llvm] [llvm-ml] Recognise `imagerel` operator (PR #209630)   via llvm-commits
• [llvm] [ThinLTO] Fix thinlto-bad-summary-5.ll in read-only environments (PR #209513)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
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• [llvm] [RISCV][MC][NFC] Cleanup Xqci Tests (PR #209646)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
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• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [MetaRenamer] Change basic block naming from 'bb' to 'bbl' (PR #205393)   Aiden Grossman via llvm-commits
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• [llvm] [Support] Treat Windows "nul" as the null device in writeToOutput (PR #208179)   Wenju He via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Justin Lebar via llvm-commits
• [llvm] [Support] Treat Windows "nul" as the null device in writeToOutput (PR #208179)   Wenju He via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Justin Lebar via llvm-commits
• [llvm] [Support] Treat Windows "NUL" as the null device in writeToOutput (PR #208179)   Wenju He via llvm-commits
• [llvm] [Support] Treat Windows "NUL" as the null device in writeToOutput (PR #208179)   Wenju He via llvm-commits
• [llvm] [Support] Treat Windows "NUL" as the null device in writeToOutput (PR #208179)   Wenju He via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for double/float (PR #209652)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add KCSAN inspired GPU ConcurrencySanitizer runtime (PR #207714)   Joseph Huber via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] 6ce9488 - [lit] Remove most external shell test coverage   via llvm-commits
• [llvm] [lit] Remove most external shell test coverage (PR #209500)   Aiden Grossman via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [llvm] [LoopUnroll] Fix freqs for unconditional latches: N>2, uniform (PR #182405)   Joel E. Denny via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib split vector llvm.sincos when only sin/cos veclib mappings exist (PR #194639)   Kito Cheng via llvm-commits
• [llvm] [LoopUnroll] Fix freqs for unconditional latches: N>2, uniform (PR #182405)   Joel E. Denny via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add KCSAN inspired GPU ConcurrencySanitizer runtime (PR #207714)   Joseph Huber via llvm-commits
• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [llvm] f6a359f - [CodeGen] Teach ReplaceWithVeclib split vector llvm.sincos when only sin/cos veclib mappings exist (#194639)   via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib split vector llvm.sincos when only sin/cos veclib mappings exist (PR #194639)   Kito Cheng via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [llvm] 2033c45 - [SampleProfile] Remove ProfileHasAttribute parameter from readFuncMetadata (NFC) (#208604)   via llvm-commits
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• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [clang] [llvm] Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (PR #194616)   Kito Cheng via llvm-commits
• [llvm] [FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (PR #207484)   Joel E. Denny via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [llvm] [MIPS] Support MIPS I hard-float double loads/stores with LWC1/SWC1 (PR #209362)   via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
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• [clang] [llvm] Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (PR #194616)   Kito Cheng via llvm-commits
• [llvm] [CycleInfo] Move representation-dependent queries to GenericCycleInfo. NFC (PR #209665)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Move representation-dependent queries to GenericCycleInfo. NFC (PR #209665)   via llvm-commits
• [llvm] [CycleInfo] Move representation-dependent queries to GenericCycleInfo. NFC (PR #209665)   via llvm-commits
• [llvm] [CMake] Add -Wl, -z, pack-relative-relocs if supported (PR #208217)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add KCSAN inspired GPU ConcurrencySanitizer runtime (PR #207714)   Joseph Huber via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
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• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   via llvm-commits
• [llvm] [InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   via llvm-commits
• [llvm] [InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   via llvm-commits
• [llvm] [LLVM] Use kwargs for ShTest constructor (PR #209676)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   via llvm-commits
• [llvm] [HLSL][DirectX] Lower llvm.dx.load.input and llvm.dx.store.output to DXIL (PR #208871)   Dan Brown via llvm-commits
• [llvm] [HLSL][DirectX] Lower llvm.dx.load.input and llvm.dx.store.output to DXIL (PR #208871)   Dan Brown via llvm-commits
• [llvm] [HLSL][DirectX] Lower llvm.dx.load.input and llvm.dx.store.output to DXIL (PR #208871)   via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
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• [llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)   Pengcheng Wang via llvm-commits
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• [llvm] [LLVM] Use kwargs for ShTest constructor (PR #209676)   Sharjeel Khan via llvm-commits
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• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] 11ebc0e - [AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider scalars (#207999)   via llvm-commits
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• [llvm] [CodeGen][NPM] Disable Machine verifier at the end of default pipelines (PR #208357)   Vikram Hegde via llvm-commits
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• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Shilei Tian via llvm-commits
• [llvm] [CodeGen] [AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [DWARFLinker] Make synthetic type names deterministic under threading (PR #209553)   Jonas Devlieghere via llvm-commits
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• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Shilei Tian via llvm-commits
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• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Luke Lau via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [orc-rt] Sort header and source lists in CMakeLists. NFC. (PR #209685)   Lang Hames via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Alexis Engelke via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Arda Serdar Pektezol via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Arda Serdar Pektezol via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [clang] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [RISCV][MC] Improve GPR Error Messages (PR #209669)   Luke Lau via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   Aleksandr Platonov via llvm-commits
• [llvm] [CodeExtractor] Reject regions with terminating deoptimize (PR #204560)   Arda Serdar Pektezol via llvm-commits
• [llvm] [Analysis] Add function-scoped DDG DOT printer (dot-function-ddg) (PR #209089)   Sumukh J Bharadwaj via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   David Zbarsky via llvm-commits
• [llvm] [AMDGPU][CodeGen] Fix `S_NOP` insertion during `S_SET_VGPR_MSB` placement (PR #209525)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Robert Imschweiler via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [clang] [lld] [llvm] [WIP] LTO with linker scripts, end-to-end. (PR #204282)   via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Arda Serdar Pektezol via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Elvis Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)   via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Son Tuan Vu via llvm-commits
• [llvm] [RISCV][MC] Improve GPR Error Messages (PR #209669)   Sam Elliott via llvm-commits
• [llvm] [RISCV][MC] Improve GPR Error Messages (PR #209669)   Sam Elliott via llvm-commits
• [clang] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [LFI][AArch64] Add PAC support (PR #207915)   Zachary Yedidia via llvm-commits
• [llvm] [libc][bazel] Add recently added sys/socket functions and syscall wrappers (PR #209457)   Pavel Labath via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   David Zbarsky via llvm-commits
• [llvm] [Bazel] Fixes 36c6568 (PR #209689)   via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   Kamlesh Kumar via llvm-commits
• [llvm] [Bazel] Fixes 36c6568 (PR #209689)   via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   David Green via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   David Green via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   David Green via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   David Green via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Carl Ritson via llvm-commits
• [llvm] [RISCV][MC] Improve GPR Error Messages (PR #209669)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Ben Dunbobbin via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   David Green via llvm-commits
• [llvm] 69e0994 - [Docs] Document Qualification WG artifacts and meeting archive (#209382)   via llvm-commits
• [llvm] [Docs] Document Qualification WG artifacts and meeting archive (PR #209382)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Fold sub+select abs-diff patterns with sext/zext operands (PR #209383)   Kunal Chadha via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] [VPlan] Thread branch weights into VPlan and use them for cost (NFCI) (PR #209309)   Luke Lau via llvm-commits
• [llvm] bff9c54 - [RISCV][MC] Improve GPR Error Messages (#209669)   via llvm-commits
• [llvm] [RISCV][MC] Improve GPR Error Messages (PR #209669)   Sam Elliott via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in MC layer (PR #206766)   Valery Pykhtin via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Fangrui Song via llvm-commits
• [llvm] [LV] Simplify Blend/Select chain for tail folding outer loop reductions (PR #209659)   Ramkumar Ramachandra via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Alexis Engelke via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [SPIR-V] Remove dead typed pointer check in getArgSPIRVType (PR #209515)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] 15776b5 - [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (#209677)   via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Fangrui Song via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Unify duplicated named MDNode lookup helper (PR #209376)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] af84127 - [SPIR-V] Remove dead typed pointer check in getArgSPIRVType (#209515)   via llvm-commits
• [llvm] [SPIR-V] Remove dead typed pointer check in getArgSPIRVType (PR #209515)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Preserve offset alignment in pointer cast legalization (PR #209251)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Arseniy Obolenskiy via llvm-commits
• [llvm] b78a0ac - [SPIR-V] Unify duplicated named MDNode lookup helper (#209376)   via llvm-commits
• [llvm] [SPIR-V] Unify duplicated named MDNode lookup helper (PR #209376)   Arseniy Obolenskiy via llvm-commits
• [llvm] 771d152 - [SPIR-V] Preserve offset alignment in pointer cast legalization (#209251)   via llvm-commits
• [llvm] [SPIR-V] Preserve offset alignment in pointer cast legalization (PR #209251)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] 046acff - [RISCV][P-ext] Add packed saturating rounding shift codegen (#208630)   via llvm-commits
• [llvm] [LoongArch] Add DAG combines for vector widening extends (PR #207316)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed saturating rounding shift codegen (PR #208630)   via llvm-commits
• [llvm] [VPlan] Pass ArrayRef<VPValue *> instead ArrayRef<const VPValue *> (NFC) (PR #197193)   Ramkumar Ramachandra via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Ramkumar Ramachandra via llvm-commits
• [llvm] 396a2d7 - [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (#208006)   via llvm-commits
• [llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)   via llvm-commits
• [llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)   via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Nathan Gauër via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   via llvm-commits
• [llvm] bdd15ff - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (34) (#209598)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (34) (PR #209598)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (PR #209599)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (PR #209599)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (PR #209599)   Matt Arsenault via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - enable shuffle combining of concat(extractsub(shuffle),extractsub(shuffle)) patterns (PR #209510)   Simon Pilgrim via llvm-commits
• [llvm] 06bf4bf - [X86] combineINSERT_SUBVECTOR - enable shuffle combining of concat(extractsub(shuffle),extractsub(shuffle)) patterns (#209510)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - enable shuffle combining of concat(extractsub(shuffle),extractsub(shuffle)) patterns (PR #209510)   Simon Pilgrim via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   James Henderson via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   James Henderson via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [llvm] [CSKY] Add missing <map> include in CSKYTargetStreamer.h (PR #209384)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Pengcheng Wang via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Edd Dawson via llvm-commits
• [llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)   Phoebe Wang via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)   via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jack Styles via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jack Styles via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jack Styles via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)   via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] 13bdd50 - [AArch64][ISel] Enable masked interleaved stores for splat values (#207950)   via llvm-commits
• [llvm] [AArch64][ISel] Enable masked interleaved stores for splat values (PR #207950)   Harry Ramsey via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Nikita Popov via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   James Henderson via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Sam Elliott via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] 0d33149 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (#209599)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (PR #209599)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (PR #209600)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Sam Elliott via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Allocator] Drop RedZoneSize (non-sanitizer) and BytesAllocated members (PR #205711)   Paul Osmialowski via llvm-commits
• [llvm] [SPIR-V] Handle bfloat in getZeroFP/getOneFP (PR #202859)   Arseniy Obolenskiy via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (PR #198143)   David Spickett via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Support] Advance the buffer after partial file writes (PR #209480)   via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] 1a0ddbd - [GlobalISel] Filter combiner worklists (#197693)   via llvm-commits
• [llvm] [GlobalISel] Filter combiner worklists (PR #197693)   Cullen Rhodes via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   via llvm-commits
• [llvm] 3e4160f - [X86] Skip debug instructions in tile copy lowering (#209640)   via llvm-commits
• [llvm] [X86] Skip debug instructions in tile copy lowering (PR #209640)   Nikita Popov via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Pankaj Dwivedi via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] 0e877fd - Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (#194616)   via llvm-commits
• [clang] [llvm] Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (PR #194616)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   Matt Arsenault via llvm-commits
• [llvm] [NextUseDistance] Make sure that both instructions have an updated ID (PR #209651)   Matt Arsenault via llvm-commits
• [llvm] [NextUseDistance] Make sure that both instructions have an updated ID (PR #209651)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Florian Hahn via llvm-commits
• [llvm] [CodeGen][ISel] Fix inline assembly crash during instruction selection with direct memory output constraint (PR #209439)   Chibuoyim Ogbonna via llvm-commits
• [llvm] [ConstraintElim] Transfer SLE facts to unsigned (PR #209623)   Nikita Popov via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Momchil Velikov via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [AMDGPU] Avoid errors with 24-bit div/rem (PR #209711)   via llvm-commits
• [llvm] [AMDGPU] Avoid errors with 24-bit div/rem (PR #209711)   via llvm-commits
• [llvm] [AMDGPU] Avoid errors with 24-bit div/rem (PR #209711)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid errors with 24-bit div/rem (PR #209711)   Matt Arsenault via llvm-commits
• [llvm] Fix test that had a check embedded which depended on the current LLVM version number. (PR #209530)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [AArch64] Lower fixed width bf16 fpround (PR #209411)   Paul Walker via llvm-commits
• [llvm] [LoongArch] Add DAG combines for vector widening extends (PR #207316)   via llvm-commits
• [llvm] a208080 - [NFC][AMDGPU] Use SIInstrFlags predicates in MC layer (#206766)   via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in MC layer (PR #206766)   Valery Pykhtin via llvm-commits
• [llvm] f48b09b - [Driver][DirectX] Add `/Qsource_in_debug_module` flag (#204415)   via llvm-commits
• [clang] [llvm] [Driver][DirectX] Add `/Qsource_in_debug_module` flag (PR #204415)   Ilia Kuklin via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Matt Arsenault via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils, a reusable iteration-space loop splitter (PR #209142)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   Paul Walker via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [CMake] Add -Wl, -z, pack-relative-relocs if supported (PR #208217)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Luke Lau via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [SimplifyCFG] Add foldCondStoreToSelect optimization (PR #207654)   Karthika Devi C via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   Kseniya Tikhomirova via llvm-commits
• [llvm] [DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (PR #209715)   Wenju He via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (PR #209715)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Handle WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AMDGPU] Handle WAR hazards (PR #201619)   via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #209717)   Emery Conrad via llvm-commits
• [clang] [llvm] Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (PR #209717)   Emery Conrad via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Michael Kruse via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [SimplifyCFG] Add foldCondStoreToSelect optimization (PR #207654)   Ramkumar Ramachandra via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Karthika Devi C via llvm-commits
• [llvm] [libsycl] implement methods of synchronization in event and queue classes (PR #205860)   LLVM Continuous Integration via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Karthika Devi C via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Jay Foad via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [polly] df1838f - [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (#205756)   via llvm-commits
• [polly] [Polly] Skip vectorize.enable for FP loops with dist=1 dependences (PR #205756)   Karthika Devi C via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Jay Foad via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Hongyu Chen via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Matt Arsenault via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [llvm] [libsycl] Add missing include to test (PR #209722)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - popcnt(x) to s_bcnt0_i32 (PR #164847)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (PR #209600)   Pierre van Houtryve via llvm-commits
• [llvm] [Passes] Run LoopSimplify before SLP (PR #209332)   Nikita Popov via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [clang] [llvm] [Clang] Fix assertion failure when passing wide string literal to __builtin_nanf (PR #205452)   via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Matt Arsenault via llvm-commits
• [llvm] [libsycl] fix mock error in unittest helper (PR #209726)   Kseniya Tikhomirova via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - popcnt(x) to s_bcnt0_i32 (PR #164847)   Matt Arsenault via llvm-commits
• [llvm] d0a85f5 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (#209600)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (PR #209600)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37) (PR #209601)   Matt Arsenault via llvm-commits
• [llvm] c58ba1c - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37) (#209601)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37) (PR #209601)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Matt Arsenault via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [flang] [llvm] [Flang][CMake] Use fakeflang as dispatcher (PR #209482)   Michael Kruse via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [offload] add nodiscard support to offload-tblgen and mark olInit (PR #209727)   via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Matt Arsenault via llvm-commits
• [llvm] [offload] add nodiscard support to offload-tblgen and mark olInit (PR #209727)   via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (PR #209600)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Improve amdgcn_kill verification (PR #208220)   Robert Imschweiler via llvm-commits
• [llvm] [runtimes] Add explicit offload arch tool dependencies (PR #206076)   Robert Imschweiler via llvm-commits
• [llvm] 11cc8d8 - [ConstraintElim] Transfer SLE facts to unsigned (#209623)   via llvm-commits
• [llvm] [ConstraintElim] Transfer SLE facts to unsigned (PR #209623)   Florian Hahn via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] 1d41488 - [VPlan] Fix nowrap flags for strided access pointers from SCEV (#209453)   via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Mel Chen via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Matt Arsenault via llvm-commits
• [llvm] 54e36d6 - [SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (#207958)   via llvm-commits
• [llvm] [SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (PR #207958)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Benjamin Maxwell via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [AMDGPU] Add SSA-form memory clause pass (SSASIFormMemoryClauses) (PR #209656)   Carl Ritson via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   via llvm-commits
• [clang] [llvm] [RegAlloc] [X86] Enable callee saved register optimization for x86 (PR #188609)   Shreeyash Pandey via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - enable shuffle combining of insertsub(extractsub(shuffle),extractsub(shuffle)) patterns (PR #209735)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add SSA-form memory clause pass (SSASIFormMemoryClauses) (PR #209656)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209305)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [llvm] 96a53b1 - [SLP] Support memory runtime alias checks   via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209305)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   LLVM Continuous Integration via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [clang] [llvm] [clang][coverage] Add opt-in call continuation counters for coverage (PR #201079)   Ankur raj via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   Lucas Ramirez via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] [AMDGPU] Fix AAAMDWavesPerEU to union caller waves-per-eu ranges (PR #207903)   Arseniy Obolenskiy via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Fix AAAMDWavesPerEU to union caller waves-per-eu ranges (PR #207903)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix AAAMDWavesPerEU to union caller waves-per-eu ranges (PR #207903)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Piotr Fusik via llvm-commits
• [llvm] eb2163a - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (#209602)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (PR #209602)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (39) (PR #209729)   Matt Arsenault via llvm-commits
• [llvm] c8c0877 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (39) (#209729)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (39) (PR #209729)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (40) (PR #209730)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Driver][DirectX] Add `/Qstrip_debug` flag (PR #204832)   Ilia Kuklin via llvm-commits
• [llvm] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0, 1] -> X (PR #209741)   Andreas Jonson via llvm-commits
• [llvm] [runtimes] Add explicit offload arch tool dependencies (PR #206076)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0, 1] -> X (PR #209741)   via llvm-commits
• [llvm] [lldb][bazel] Add the lldb-mcp binary to the Bazel overlay (PR #209498)   David Young via llvm-commits
• [llvm] e41f5aa - [runtimes] Add explicit offload arch tool dependencies (#206076)   via llvm-commits
• [llvm] [runtimes] Add explicit offload arch tool dependencies (PR #206076)   Robert Imschweiler via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (PR #209284)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   via llvm-commits
• [llvm] [lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (PR #209747)   David Young via llvm-commits
• [llvm] [AArch64] Add patterns for selecting dec from sub (PR #209467)   Paul Walker via llvm-commits
• [llvm] 1980283 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (40) (#209730)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (40) (PR #209730)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (41) (PR #209731)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] f482000 - [AArch64] Remove HCX feature flag from backend (#209477)   via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [lldb][bazel] Add PlatformWasm plugin library to the Bazel overlay (PR #209749)   David Young via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Karthika Devi C via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Karthika Devi C via llvm-commits
• [llvm] cceae35 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (41) (#209731)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (41) (PR #209731)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (42) (PR #209732)   Matt Arsenault via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix asan_interceptors.cpp build warning -Wunused-template (PR #209750)   Wenju He via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Alexey Bataev via llvm-commits
• [compiler-rt] [compiler-rt] Fix asan_interceptors.cpp build warning -Wunused-template (PR #209750)   via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [orc-rt] Fix WrapperFunctionBuffer empty range construction (PR #209751)   Lang Hames via llvm-commits
• [clang] [llvm] [AArch64] Remove HCX feature flag from backend (PR #209477)   via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [llvm] [TableGen] Short-circuit !cond operator (PR #208942)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] 567c6a7 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (42) (#209732)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (42) (PR #209732)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (43) (PR #209733)   Matt Arsenault via llvm-commits
• [llvm] 2746fc6 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (43) (#209733)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (43) (PR #209733)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44) (PR #209734)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (PR #209747)   David Young via llvm-commits
• [llvm] [orc-rt] Fix WrapperFunctionBuffer empty range construction (PR #209751)   Lang Hames via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [SLP]Add umax/umin/smax/smin as main opcodes for copyables (PR #209326)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Jay Foad via llvm-commits
• [lldb] [llvm] [lldb][windows] recommend building with Python 3.11 (PR #191159)   Charles Zablit via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Jessica Clarke via llvm-commits
• [llvm] [libc][bazel] Add missing hdr/*_macros deps to test targets (PR #209761)   David Young via llvm-commits
• [llvm] [lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (PR #209747)   David Young via llvm-commits
• [llvm] 653c1da - [X86] combineINSERT_SUBVECTOR - enable shuffle combining of insertsub(extractsub(shuffle),extractsub(shuffle)) patterns (#209735)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - enable shuffle combining of insertsub(extractsub(shuffle),extractsub(shuffle)) patterns (PR #209735)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Tim Besard via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209305)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Tim Besard via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [ConstraintElim] decompose nsw subtract with guard as precondition (PR #209615)   Antonio Frighetto via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Tim Besard via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Nikita Popov via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Phoebe Wang via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jack Styles via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Nikita Popov via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   John Brawn via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   via llvm-commits
• [llvm] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0, 1] -> X (PR #209741)   via llvm-commits
• [llvm] [NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (PR #198143)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [lld] [lldb] [llvm] [mlir] [polly] [lldb] Drop support for using the external shell (PR #209627)   Aiden Grossman via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [lld] [lldb] [llvm] [mlir] [polly] [lldb] Drop support for using the external shell (PR #209627)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add OMOD folding for TRANS bfloat16 instructions (PR #208595)   Jay Foad via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Nikita Popov via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - popcnt(x) to s_bcnt0_i32 (PR #164847)   Jay Foad via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [VPlan] Migrate VPBuilder to VPInsertPt fully (NFC) (PR #209764)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce address space 13 for VGPR as memory (PR #208557)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [VPlan] Fold ALM with const operands (PR #208852)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Shilei Tian via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   Aleksandr Platonov via llvm-commits
• [llvm] [NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (PR #198143)   via llvm-commits
• [llvm] [WebAssembly] Introduce CodeGenPassBuilder (PR #208983)   Aiden Grossman via llvm-commits
• [llvm] 9a4decc - [WebAssembly] Introduce CodeGenPassBuilder   via llvm-commits
• [llvm] [WebAssembly] Introduce CodeGenPassBuilder (PR #208983)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyAddMissingPrototypesPass to NewPM (PR #208985)   Aiden Grossman via llvm-commits
• [llvm] f445284 - [WebAssembly] Port WebAssemblyAddMissingPrototypesPass to NewPM   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyAddMissingPrototypesPass to NewPM (PR #208985)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 36c6568 (PR #209689)   Jordan Rupprecht via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixFunctionBitcastsPass to NewPM (PR #208986)   Aiden Grossman via llvm-commits
• [llvm] f69748c - [WebAssembly] Port WebAssemblyFixFunctionBitcastsPass to NewPM   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixFunctionBitcastsPass to NewPM (PR #208986)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 36c6568 (PR #209689)   Jordan Rupprecht via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyOptimizeReturnedPass (PR #209036)   Aiden Grossman via llvm-commits
• [llvm] 491539a - [WebAssembly] Port WebAssemblyOptimizeReturnedPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyOptimizeReturnedPass (PR #209036)   Aiden Grossman via llvm-commits
• [llvm] [libc][bazel] Add missing hdr/*_macros deps to test targets (PR #209761)   via llvm-commits
• [llvm] [AMDGPU] Fix set_inactive known bits to intersect both operands (PR #201817)   Jay Foad via llvm-commits
• [compiler-rt] [compiler-rt] Fix amdgcn -> amdgpu conversion for compiler-rt (PR #209765)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLowerEmscriptenEHSjLjImpl (PR #209040)   Aiden Grossman via llvm-commits
• [llvm] [libc][bazel] Add missing hdr/*_macros deps to test targets (PR #209761)   Jordan Rupprecht via llvm-commits
• [llvm] 5fcfb4d - [WebAssembly] Port WebAssemblyLowerEmscriptenEHSjLjImpl   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLowerEmscriptenEHSjLjImpl (PR #209040)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [libc][bazel] Add missing hdr/*_macros deps to test targets (PR #209761)   Jordan Rupprecht via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyReduceToAnyAllTruePass (PR #209043)   Aiden Grossman via llvm-commits
• [llvm] 044f8a1 - [WebAssembly] Port WebAssemblyReduceToAnyAllTruePass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyReduceToAnyAllTruePass (PR #209043)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Luke Lau via llvm-commits
• [llvm] [lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (PR #209747)   Jordan Rupprecht via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   Luke Lau via llvm-commits
• [llvm] 868e3b8 - [AMDGPU] Fix set_inactive known bits to intersect both operands (#201817)   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyRefTypeMem2LocalPass (PR #209044)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Fix set_inactive known bits to intersect both operands (PR #201817)   Arseniy Obolenskiy via llvm-commits
• [llvm] 8396c75 - [WebAssembly] Port WebAssemblyRefTypeMem2LocalPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyRefTypeMem2LocalPass (PR #209044)   Aiden Grossman via llvm-commits
• [llvm] [libsycl] Add missing include to test (PR #209722)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add missing include to test (PR #209722)   Nick Sarnie via llvm-commits
• [llvm] [NFC][WebAssembly] Move WebAssemblyCoalesceFeaturesAndStripAtomics (PR #209046)   Aiden Grossman via llvm-commits
• [llvm] 2375505 - [NFC][WebAssembly] Move WebAssemblyCoalesceFeaturesAndStripAtomics   via llvm-commits
• [llvm] [NFC][WebAssembly] Move WebAssemblyCoalesceFeaturesAndStripAtomics (PR #209046)   Aiden Grossman via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCoalesceFeaturesAndStripAtomicsPass (PR #209054)   Aiden Grossman via llvm-commits
• [llvm] a2b6a1b - [WebAssembly] Port WebAssemblyCoalesceFeaturesAndStripAtomicsPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCoalesceFeaturesAndStripAtomicsPass (PR #209054)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyNullifyDebugValueListsPass (PR #209055)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyNullifyDebugValueListsPass (PR #209055)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixIrreducibleControlFlowPass (PR #209077)   Aiden Grossman via llvm-commits
• [llvm] 9d28ea2 - [WebAssembly] Port WebAssemblyNullifyDebugValueListsPass   via llvm-commits
• [llvm] 6676617 - [WebAssembly] Port WebAssemblyFixIrreducibleControlFlowPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixIrreducibleControlFlowPass (PR #209077)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyArgumentMovePass (PR #209368)   Aiden Grossman via llvm-commits
• [llvm] 8bc9dae - [WebAssembly] Port WebAssemblyArgumentMovePass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyArgumentMovePass (PR #209368)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Add patterns for selecting dec from sub (PR #209467)   John Brawn via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >=s 0 as X >=s 0 && Y >=s 0. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ehsan Amiri via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   Nico Weber via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   Nico Weber via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Nikita Popov via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] [bazel][libc] Add missing header deps (PR #209767)   Jordan Rupprecht via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [VPlan] Migrate VPBuilder to VPInsertPt fully (NFC) (PR #209764)   via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [VPlan] Migrate VPBuilder to VPInsertPt fully (NFC) (PR #209764)   Ramkumar Ramachandra via llvm-commits
• [llvm] [libc][bazel] Add missing hdr/*_macros deps to test targets (PR #209761)   Jordan Rupprecht via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [lldb][bazel] Add the lldb-mcp binary to the Bazel overlay (PR #209498)   Jordan Rupprecht via llvm-commits
• [llvm] [lldb][bazel] Add PlatformWasm plugin library to the Bazel overlay (PR #209749)   Jordan Rupprecht via llvm-commits
• [llvm] [lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (PR #209747)   Jordan Rupprecht via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [llvm-profgen] Support Arm SPE and BRBE branch profiles (PR #209769)   Sergey Shcherbinin via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (PR #209715)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [lldb][bazel] Add PlatformWasm plugin library to the Bazel overlay (PR #209749)   Jordan Rupprecht via llvm-commits
• [llvm] [llvm-profgen] Support Arm SPE and BRBE branch profiles (PR #209769)   Sergey Shcherbinin via llvm-commits
• [clang] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)   via llvm-commits
• [llvm] [bazel][libc] Add missing header deps (PR #209767)   Aiden Grossman via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [VPlan] Fix nowrap flags for strided access pointers from SCEV (PR #209453)   via llvm-commits
• [llvm] [bazel][libc] Add missing header deps (PR #209767)   via llvm-commits
• [llvm] [bazel][libc] Add missing header deps (PR #209767)   Jordan Rupprecht via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Son Tuan Vu via llvm-commits
• [llvm] [llvm-profgen] Support Arm SPE and BRBE branch profiles (PR #209769)   via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)   Lucas Ramirez via llvm-commits
• [compiler-rt] [compiler-rt] Fix amdgcn -> amdgpu conversion for compiler-rt (PR #209765)   Matt Arsenault via llvm-commits
• [llvm] 0d6013c - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44) (#209734)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44) (PR #209734)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (45) (PR #209753)   Matt Arsenault via llvm-commits
• [llvm] 957b663 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (45) (#209753)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (45) (PR #209753)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (46) (PR #209754)   Matt Arsenault via llvm-commits
• [llvm] f829df1 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (46) (#209754)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (46) (PR #209754)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (47) (PR #209755)   Matt Arsenault via llvm-commits
• [llvm] 703e9b3 - [Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (#193568)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (PR #193568)   Tom Eccles via llvm-commits
• [llvm] f1cb3d3 - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (47) (#209755)   via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Christudasan Devadasan via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Christudasan Devadasan via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (47) (PR #209755)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (48) (PR #209756)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] c78147a - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (48) (#209756)   via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Antonio Frighetto via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (48) (PR #209756)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (49) (PR #209757)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)   Feng Zou via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (49) (PR #209757)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (49) (PR #209757)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [APFloat] Generalize bitcast to also cover x87 semantics (PR #209781)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209305)   Alexey Bataev via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [AMDGPU][True16] Fix MadMix selection (PR #205431)   Domenic Nutile via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [APFloat] Generalize bitcast to also cover x87 semantics (PR #209781)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Hubert Tong via llvm-commits
• [llvm] [AMDGPU][True16] Upstream more true16-related testing changes (NFC) (PR #208320)   Domenic Nutile via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Hubert Tong via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [APFloat] Generalize bitcast to also cover x87 semantics (PR #209781)   via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] Fix llvm-tblgen on C++23 libc++ (PR #209783)   Nikhil Kalra via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   Pavel Labath via llvm-commits
• [llvm] [gn build] Port 9a4deccf90ae (PR #209799)   Nico Weber via llvm-commits
• [llvm] [gn build] Port ef118b5b3a61 (PR #209800)   Nico Weber via llvm-commits
• [llvm] [gn] add a dep added in 9a4deccf90ae9 (PR #209801)   Nico Weber via llvm-commits
• [llvm] [LLVM][ADT] Adding range-based test_all and test_any methods (PR #209790)   Markos Horro via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   via llvm-commits
• [llvm] [AMDGPU][True16] Upstream more true16-related testing changes (NFC) (PR #208320)   Domenic Nutile via llvm-commits
• [llvm] [gn build] Port 9a4deccf90ae (PR #209799)   Nico Weber via llvm-commits
• [llvm] 21db8e9 - [gn build] Port 9a4deccf90ae (#209799)   via llvm-commits
• [llvm] [gn build] Port 9a4deccf90ae (PR #209799)   Nico Weber via llvm-commits
• [llvm] bfc2d55 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (51) (#209777)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (51) (PR #209777)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (52) (PR #209778)   Matt Arsenault via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   via llvm-commits
• [llvm] ff58fb1 - AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (52) (#209778)   via llvm-commits
• [llvm] AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (52) (PR #209778)   Matt Arsenault via llvm-commits
• [lld] [WebAssembly] Default export tables with `--cooperative-threading` (PR #208263)   Alex Crichton via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (53) (PR #209779)   Matt Arsenault via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Aleksandr Popov via llvm-commits
• [llvm] [gn] add a dep added in 9a4deccf90ae9 (PR #209801)   Nico Weber via llvm-commits
• [llvm] 4596278 - [gn build] Port ef118b5b3a61 (#209800)   via llvm-commits
• [llvm] [gn build] Port ef118b5b3a61 (PR #209800)   Nico Weber via llvm-commits
• [llvm] [gn] add a dep added in 9a4deccf90ae9 (PR #209801)   Nico Weber via llvm-commits
• [llvm] [gn] add a dep added in 9a4deccf90ae9 (PR #209801)   Nico Weber via llvm-commits
• [llvm] [GlobalISel] Legalize wide-memory extending loads via load + extension (PR #206276)   Nathan Corbyn via llvm-commits
• [llvm] [LV] Fix LoopVectorize/X86/CostModel tests when regenerated with UTC. NFC (PR #209802)   Luke Lau via llvm-commits
• [llvm] d0231d2 - [LV] Fix LoopVectorize/X86/CostModel tests when regenerated with UTC. NFC (#209802)   via llvm-commits
• [llvm] [LV] Fix LoopVectorize/X86/CostModel tests when regenerated with UTC. NFC (PR #209802)   Luke Lau via llvm-commits
• [llvm] Update TestingGuide with LLVM PR merge advice (PR #207754)   John Otken via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)   Simon Pilgrim via llvm-commits
• [llvm] ee08b1c - AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (53) (#209779)   via llvm-commits
• [llvm] AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (53) (PR #209779)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate tests with regenerated checks to amdgpu subarch triple (54) (PR #209780)   Matt Arsenault via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Corentin Jabot via llvm-commits
• [llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Replace autoconversion with TextEncodingConverter converters (PR #206519)   Hubert Tong via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [GlobalISel] Emit G_BITCAST for same-size scalar reassembly (PR #200946)   Michal Paszkowski via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [PowerPC] Remove itinerary IIC_LdStDCBA (PR #207227)   Lei Huang via llvm-commits
• [llvm] [VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [clang] [flang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [llvm] [VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [llvm] [LLVM] Fix not passing CMAKE_CROSSCOMPILING_EMULATOR for amdgpu (PR #209828)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [llvm] [WIP][VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [llvm] [WIP][VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [llvm] [BPF] Use UTC for sink-min-max.ll (PR #209681)   Mircea Trofin via llvm-commits
• [llvm] [LLVM][ADT] Adding range-based test_all and test_any methods for BitVector (PR #209790)   Markos Horro via llvm-commits
• [llvm] [WIP][VPlan] Don't quadratically cost address computation for scalarized mem ops (PR #209830)   Luke Lau via llvm-commits
• [llvm] e956df2 - [LLVM][ADT] Adding range-based test_all and test_any methods for BitVector (#209790)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)   Simon Pilgrim via llvm-commits
• [llvm] 0639fe1 - [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (#209803)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Limit unclaused VMEM w/a to specific targets (PR #209843)   Siu Chi Chan via llvm-commits
• [llvm] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0, 1] -> X (PR #209741)   Andreas Jonson via llvm-commits
• [clang] [llvm] [AMDGPU] Guard more intrinsics with target features (PR #203956)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Limit unclaused VMEM w/a to specific targets (PR #209843)   Krzysztof Drewniak via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Did not put fake_use into delay slot (PR #201537)   via llvm-commits
• [llvm] 693ded3 - [LLVM] Fix not passing CMAKE_CROSSCOMPILING_EMULATOR for amdgpu (#209828)   via llvm-commits
• [llvm] [LLVM] Fix not passing CMAKE_CROSSCOMPILING_EMULATOR for amdgpu (PR #209828)   Joseph Huber via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Craig Topper via llvm-commits
• [llvm] [BOLT] Skip function instead of aborting on jump table analysis failure (PR #206742)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix CUDA Fortran device-variable memory leaks, and allow `cudaDeviceReset()` before program end (PR #207843)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Andreas Jonson via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Andreas Jonson via llvm-commits
• [llvm] AMDGPU: Migrate tests with regenerated checks to amdgpu subarch triple (54) (PR #209780)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Guard more intrinsics with target features (PR #203956)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [AMDGPU] Guard more intrinsics with target features (PR #203956)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Limit unclaused VMEM w/a to specific targets (PR #209843)   Shilei Tian via llvm-commits
• [llvm] [bazel][mlir] Port b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831 (PR #209854)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir] Port b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831 (PR #209854)   Anshul Nigham via llvm-commits
• [llvm] [ICP] Introduce a hot function cutoff threshold for ICP (PR #208060)   Congzhe Cao via llvm-commits
• [llvm] [ICP] Introduce a hot function cutoff threshold for ICP (PR #208060)   Congzhe Cao via llvm-commits
• [llvm] [ICP] Introduce a hot function cutoff threshold for ICP (PR #208060)   Congzhe Cao via llvm-commits
• [llvm] [NVPTX] Set default value of nvptx-allow-ftz-atomics to true (PR #206154)   Artem Belevich via llvm-commits
• [llvm] [SPIRV] Support switch terminators when merging region exits (PR #209859)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Support switch terminators when merging region exits (PR #209859)   via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Vitaly Buka via llvm-commits
• [flang] [llvm] [flang][cuda] Fix CUDA Fortran device-variable memory leaks, and allow `cudaDeviceReset()` before program end (PR #207843)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix CUDA Fortran device-variable memory leaks, and allow `cudaDeviceReset()` before program end (PR #207843)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Sergey Shcherbinin via llvm-commits
• [llvm] 9d09c77 - [VPlan] Make VPBlockTy enum protected (NFC) (#209863)   via llvm-commits
• [llvm] [VPlan] Make VPBlockTy enum protected (NFC) (PR #209863)   Florian Hahn via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [compiler-rt] 0f494fc - [codegen]Ensure __builtin_trap() has an unreachable (#197789)   via llvm-commits
• [clang] [compiler-rt] [codegen]Ensure __builtin_trap() has an unreachable (PR #197789)   Vy Nguyen via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Vitaly Buka via llvm-commits
• [compiler-rt] 23ead65 - [compiler-rt][sanitizer_common] Fix setgroups syscall pre-hook to check its input (#209207)   via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Fix setgroups syscall pre-hook to check its input (PR #209207)   Vitaly Buka via llvm-commits
• [llvm] 0959950 - [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (#204951)   via llvm-commits
• [llvm] [LowerTypeTests] Avoid null dereference on invalid branch funnel operand (PR #204951)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Fix setgroups syscall pre-hook to check its input (PR #209207)   via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [llvm] ce586b5 - [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (#209652)   via llvm-commits
• [llvm] [msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (PR #209652)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] Fix asan_interceptors.cpp build warning -Wunused-template (PR #209750)   Vitaly Buka via llvm-commits
• [compiler-rt] 835ae52 - [compiler-rt] Fix asan_interceptors.cpp build warning -Wunused-template (#209750)   via llvm-commits
• [llvm] [AMDGPU] Testing cleanup in prep for true16 test upstreaming (PR #209888)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU][True16] Upstream more true16-related testing changes (NFC) (PR #208320)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU][True16] Upstream more true16-related testing changes (NFC) (PR #208320)   Domenic Nutile via llvm-commits
• [clang] [llvm] [docs] Rename selected Clang docs to Markdown (PR #209281)   Reid Kleckner via llvm-commits
• [llvm] 2cffd19 - [NFC][PowerPC] Delete redundant ISD::TRUNCATE from setTargetDAGCombine (#200902)   via llvm-commits
• [llvm] [NFC][PowerPC] Delete redundant ISD::TRUNCATE from setTargetDAGCombine (PR #200902)   zhijian lin via llvm-commits
• [clang] [llvm] [docs] Rename selected Clang docs to Markdown (PR #209281)   Reid Kleckner via llvm-commits
• [clang] [llvm] [docs] Rewrite selected Clang docs to Markdown (PR #209283)   Reid Kleckner via llvm-commits
• [clang] [compiler-rt] [codegen]Ensure __builtin_trap() has an unreachable (PR #197789)   Jordan Rupprecht via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Reject sub-dword format buffer loads and stores (PR #209703)   Matt Arsenault via llvm-commits
• [llvm] github-upload-release: Create draft releases (PR #209876)   Douglas Yung via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   via llvm-commits
• [llvm] Fix/instrumentor indirect on gpu (PR #209835)   via llvm-commits
• [llvm] [AMDGPU] Testing cleanup in prep for true16 test upstreaming (PR #209888)   via llvm-commits
• [llvm] PPC: Remove manual run of machine verifier (PR #208032)   Lei Huang via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Added Downward Propagation for the attribute "amdgpu-agpr-alloc" (PR #208847)   via llvm-commits
• [llvm] [ARM] Add strict uint to FP conversion handling during operation legalization (PR #208554)   via llvm-commits
• [llvm] Fix/instrumentor indirect on gpu (PR #209835)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] Fix/instrumentor indirect on gpu (PR #209835)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] PPC: Remove manual run of machine verifier (PR #208032)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (PR #209209)   Patrik Dokoupil via llvm-commits
• [lld] [docs] Rename LLD docs to Markdown (PR #209894)   Reid Kleckner via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (PR #209209)   via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [llvm] [NFC] Remove unused MCObjectFileInfo methods (PR #209906)   Arthur Eubanks via llvm-commits
• [llvm] [NFC] Remove unused MCObjectFileInfo methods (PR #209906)   via llvm-commits
• [polly] [Polly] Fix codegen assertions to account for DefinedBehaviorContext (PR #209188)   Eli Friedman via llvm-commits
• [llvm] github-upload-release: Create draft releases (PR #209876)   Tom Stellard via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Joseph Huber via llvm-commits
• [llvm] [BOLT] Skip function instead of aborting on jump table analysis failure (PR #206742)   Rafael Auler via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] [BOLT] Skip function instead of aborting on jump table analysis failure (PR #206742)   via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - ctpop(x) to s_bcnt0_i32 (PR #164847)   Patrick Simmons via llvm-commits
• [llvm] [NFC] Remove unused MCObjectFileInfo methods (PR #209906)   Pranav Kant via llvm-commits
• [llvm] [LICM] Handle conflicting preheader defs (PR #195510)   Arda Serdar Pektezol via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] [LICM] Handle conflicting preheader defs (PR #195510)   Arda Serdar Pektezol via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [llvm] [HLSL][Docs] Add metadata description of semantic signatures (PR #206804)   Finn Plummer via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [llvm] [LV] Add VPWiden{Load|Store}EVLRecipe into emitInvalidCostRemarks(). (PR #119708)   Elvis Wang via llvm-commits
• [llvm] [LV] Add VPWiden{Load|Store}EVLRecipe into emitInvalidCostRemarks(). (PR #119708)   Elvis Wang via llvm-commits
• [llvm] [flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (PR #209915)   Pranav Bhandarkar via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [clang] [llvm] [SPIRV] Pack 64-bit vec2 typed buffers into 4x32-bit images (PR #208626)   Kaitlin Peng via llvm-commits
• [llvm] [flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (PR #209915)   Pranav Bhandarkar via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (PR #209715)   Wenju He via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [llvm] [Offload][AMDGPU] Make compiler-rt libs visible (PR #209849)   Kewen Meng via llvm-commits
• [llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)   Pedro Vicente via llvm-commits
• [llvm] [BOLT] Match instrument-funcs-file entries against restored names (PR #208313)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Match instrument-funcs-file entries against restored names (PR #208313)   YongKang Zhu via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Zequan Wu via llvm-commits
• [llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   via llvm-commits
• [clang] [llvm] Skipping host target exports during cross-compilation (PR #209922)   via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   via llvm-commits
• [flang] [llvm] [flang][cuda] scalarize CUDA device integer array output (PR #209924)   Valentin Clement バレンタイン クレメン via llvm-commits
• [clang] [llvm] [offload][OpenMP] Improve cross-team reduction grid selection (PR #208253)   Dhruva Chakrabarti via llvm-commits
• [flang] [llvm] [flang][cuda] scalarize CUDA device integer array output (PR #209924)   via llvm-commits
• [compiler-rt] [tsan] Add 47-bit VMA mapping for linux/aarch64 (PR #205949)   Fei Peng via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add SSA-form memory clause pass (SSASIFormMemoryClauses) (PR #209656)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Shilei Tian via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Chuanqi Xu via llvm-commits
• [compiler-rt] f020acf - [tsan] Add 47-bit VMA mapping for linux/aarch64 (#205949)   via llvm-commits
• [compiler-rt] [tsan] Add 47-bit VMA mapping for linux/aarch64 (PR #205949)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan] Add 47-bit VMA mapping for linux/aarch64 (PR #205949)   Thurston Dang via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [llvm] [llvm-libtool-darwin] Ensure filelist buffer is null-terminated (PR #205115)   via llvm-commits
• [llvm] [CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (PR #209677)   Fangrui Song via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [CycleInfo] Drop GraphTraits and df_iterator. NFC (PR #209847)   Fangrui Song via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [llvm] [MCSchedule][NFC] Use constexpr for static constants (PR #209934)   Jordan Rupprecht via llvm-commits
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• [llvm] [ADT] Introduce EytzingerTable (PR #209343)   Kazu Hirata via llvm-commits
• [llvm] 1f9891c - [MCSchedule][NFC] Use constexpr for static constants (#209934)   via llvm-commits
• [llvm] [MCSchedule][NFC] Use constexpr for static constants (PR #209934)   Jordan Rupprecht via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [ConstraintElim] decompose nsw subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
• [llvm] [Mips] Did not put fake_use into delay slot (PR #201537)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Luke Lau via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   Kevin Bravo via llvm-commits
• [llvm] [LoongArch] Fix invalid VEXTH combines for unsupported type extensions (PR #209725)   via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [Mips] Did not put fake_use into delay slot (PR #201537)   LLVM Continuous Integration via llvm-commits
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• [llvm] 503c447 - [CycleInfo] Drop GraphTraits and df_iterator. NFC (#209847)   via llvm-commits
• [llvm] [CycleInfo] Drop GraphTraits and df_iterator. NFC (PR #209847)   Fangrui Song via llvm-commits
• [llvm] Revert "[Mips] Did not put fake_use into delay slot" (PR #209937)   via llvm-commits
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• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   via llvm-commits
• [llvm] [CycleInfo] Drop GraphTraits and df_iterator. NFC (PR #209847)   LLVM Continuous Integration via llvm-commits
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• [llvm] fc77e9d - [yaml2obj] Apply output size limit to COFF (#209695)   via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   Haohai Wen via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Luke Lau via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to COFF (PR #209695)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxVec][Scheduler] Use SchedulingPoint for pointing to scheduling front (PR #208373)   Anshil Gandhi via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [llvm] [NextUseAnalysis] Add updateInstrIds() method. (PR #209954)   Konstantina Mitropoulou via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [NextUseAnalysis] Add updateInstrIds() method. (PR #209954)   via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] Reapply "[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns" (#199371) (PR #208999)   Adam Scott via llvm-commits
• [llvm] [NextUseDistance] Make sure that both instructions have an updated ID (PR #209651)   Konstantina Mitropoulou via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [VPlan] Inline EVL pattern into single match call in optimizeLatchExitInductionUser. NFC (PR #209953)   LLVM Continuous Integration via llvm-commits
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• [llvm] Reapply "[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns" (#199371) (PR #208999)   Adam Scott via llvm-commits
• [llvm] Reapply "[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns" (#199371) (PR #208999)   Adam Scott via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed int-to-double/float builtins (PR #209900)   via llvm-commits
• [llvm] [RISCV] coalesce between VSETVLI and SF_VSETTNT (PR #203438)   Piyou Chen via llvm-commits
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• [clang] [llvm] [AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (PR #203989)   Daniel Kiss via llvm-commits
• [llvm] [VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (PR #209883)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (PR #209883)   Luke Lau via llvm-commits
• [llvm] [ADT] Introduce EytzingerTable (PR #209343)   David Li via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [llvm] 75403b0 - [ADT] Introduce EytzingerTable (#209343)   via llvm-commits
• [llvm] [ADT] Introduce EytzingerTable (PR #209343)   Kazu Hirata via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
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• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   Pranav Gorantla via llvm-commits
• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   via llvm-commits
• [llvm] 6705f3d - [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (#209080)   via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (PR #209080)   Madhur Amilkanthwar via llvm-commits
• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   via llvm-commits
• [llvm] [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (PR #209964)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (PR #209964)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (PR #209964)   via llvm-commits
• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   Pranav Gorantla via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Craig Topper via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Craig Topper via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [llvm] Fix Bazel build for 48607d2 (PR #209960)   Pranav Kant via llvm-commits
• [llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)   Pedro Vicente via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   via llvm-commits
• [llvm] [Hexagon] Recompute physreg live-ins after HexagonRDFOpt (PR207422) (PR #208050)   Ikhlas Ajbar via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   via llvm-commits
• [llvm] [ValueTracking][InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   Arseniy Obolenskiy via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVEmitIntrinsics with the new pass manager (PR #209966)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVEmitIntrinsics with the new pass manager (PR #209966)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   Haohai Wen via llvm-commits
• [llvm] [InstCombine] Use samesign constraints in unsigned known-bits folds (PR #209675)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   Haohai Wen via llvm-commits
• [llvm] [llvm-reduce] Fix !inline_history verifier issues (PR #199373)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   Adam Scott via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   David CARLIER via llvm-commits
• [llvm] [MachineScheduler] Add support for scheduling while in SSA (PR #161054)   Carl Ritson via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVEmitIntrinsics with the new pass manager (PR #209966)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVEmitIntrinsics with the new pass manager (PR #209966)   via llvm-commits
• [llvm] [MachineScheduler] Add support for scheduling while in SSA (PR #161054)   Carl Ritson via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   David CARLIER via llvm-commits
• [llvm] [llvm-libtool-darwin] Ensure filelist buffer is null-terminated (PR #205115)   Alexander Shaposhnikov via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Douglas Yung via llvm-commits
• [llvm] [llvm-libtool-darwin] Ensure filelist buffer is null-terminated (PR #205115)   Alexander Shaposhnikov via llvm-commits
• [llvm] [llvm-libtool-darwin] Ensure filelist buffer is null-terminated (PR #205115)   Alexander Shaposhnikov via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Alexander Richardson via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   Matt Arsenault via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (PR #209973)   Madhur Amilkanthwar via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (PR #209973)   via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   Matt Arsenault via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [ValueTracking][InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Sameer Sahasrabuddhe via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   via llvm-commits
• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   via llvm-commits
• [llvm] SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (PR #209977)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (PR #209977)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (PR #209977)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (PR #209977)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Sam Elliott via llvm-commits
• [llvm] [BOLT] Add fdata symbols mode (PR #209932)   YongKang Zhu via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   via llvm-commits
• [llvm] [orc-rt] Close with "// namespace" consistently. NFC. (PR #209979)   Lang Hames via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   Pavel Labath via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (PR #209973)   via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Fangrui Song via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Yaxing Cai via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
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• [llvm] ac067a7 - [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (#209128)   via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   Harrison Hao via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [llvm] [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (PR #209128)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   Ikhlas Ajbar via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   Ikhlas Ajbar via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   via llvm-commits
• [llvm] [Hexagon] Recompute physreg live-ins after HexagonRDFOpt (PR207422) (PR #208050)   Ikhlas Ajbar via llvm-commits
• [llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (PR #209987)   Nikita Popov via llvm-commits
• [llvm] 76ee189 - Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (#209987)   via llvm-commits
• [llvm] Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (PR #209987)   Nikita Popov via llvm-commits
• [llvm] Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (PR #209987)   via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Nikita Popov via llvm-commits
• [llvm] [llvm-reduce] Fix !inline_history verifier issues (PR #199373)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   Muhammed Shiyas N via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   via llvm-commits
• [llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   Matt Arsenault via llvm-commits
• [llvm] Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (PR #209987)   LLVM Continuous Integration via llvm-commits
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• [llvm] [Mips] Fix test after #209981 (PR #209993)   Fangrui Song via llvm-commits
• [llvm] [Mips] Fix test after #209981 (PR #209993)   Fangrui Song via llvm-commits
• [llvm] [LV] Convert scatter stores with constant stride into strided stores (PR #206896)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   Kane Wang via llvm-commits
• [llvm] [Mips] Fix test after #209981 (PR #209994)   Fangrui Song via llvm-commits
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• [llvm] [Mips] Fix test after #209981 (PR #209994)   via llvm-commits
• [llvm] [Mips] Fix test after #201537 (PR #209994)   Fangrui Song via llvm-commits
• [llvm] 09f8509 - [AMDGPU] Fix speculative register pressure queries (#208574)   via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix speculative register pressure queries (PR #208574)   via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   Sergei Barannikov via llvm-commits
• [llvm] Arm ropi rwpi dynreloc consts (PR #207931)   via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] Revert "[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header PHIs" (PR #209016)   Mingjie Xu via llvm-commits
• [llvm] Revert "[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header PHIs" (PR #209016)   Mingjie Xu via llvm-commits
• [llvm] [RISCV] Expand memcmp/bcmp for statically-aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [libc] [llvm] [libc] Port process utilities to hermetic mode and enable some tests (PR #209999)   Pavel Labath via llvm-commits
• [llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)   Jan Schultke via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   Nikita Popov via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Transfer implicit-defs to first instruction when lowering multi-instruction COPY (PR #194892)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Fabian Ritter via llvm-commits
• [llvm] [CodeGen] Transfer implicit-defs to first instruction when lowering multi-instruction COPY (PR #194892)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] ca6fe41 - [LangRef] State that the memory model is an axiomatic one (#208710)   via llvm-commits
• [llvm] [LangRef] State that the memory model is an axiomatic one (PR #208710)   Fabian Ritter via llvm-commits
• [llvm] [dyndbg] Add Dynamic Debugging docs (PR #210001)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   Pierre van Houtryve via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Matt Arsenault via llvm-commits
• [llvm] [SLP][X86] Add pre-commit tests for merging binary-operator input ope… (PR #210004)   Balakrishna Bandlapalli via llvm-commits
• [llvm] [dyndbg] Add Dynamic Debugging docs (PR #210001)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LoopUnroll] Invalidate SCEV after full unrolling (PR #208874)   via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Add initial multi-def rematerialization support (PR #197580)   Lucas Ramirez via llvm-commits
• [llvm] [SLP][X86] Add pre-commit tests for merging binary-operator input ope… (PR #210004)   via llvm-commits
• [llvm] aa199a3 - AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (#209976)   via llvm-commits
• [llvm] AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (PR #209976)   Matt Arsenault via llvm-commits
• [llvm] [dyndbg] Add Dynamic Debugging docs (PR #210001)   via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Simon Pilgrim via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Simon Pilgrim via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Simon Pilgrim via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Simon Pilgrim via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Simon Pilgrim via llvm-commits
• [llvm] [SLP][X86] Add pre-commit tests for merging binary-operator input ope… (PR #210004)   via llvm-commits
• [llvm] AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (PR #209818)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (PR #209818)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (PR #203989)   Daniel Kiss via llvm-commits
• [llvm] AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (PR #209818)   Matt Arsenault via llvm-commits
• [llvm] 2bc2229 - AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (#209818)   via llvm-commits
• [llvm] AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (PR #209818)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate MIR parser tests to new subarch triples (59) (PR #209819)   Matt Arsenault via llvm-commits
• [llvm] 0f6a60f - AMDGPU: Migrate MIR parser tests to new subarch triples (59) (#209819)   via llvm-commits
• [llvm] AMDGPU: Migrate MIR parser tests to new subarch triples (59) (PR #209819)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use amdgpu triples in llvm-split tests (60) (PR #209866)   Matt Arsenault via llvm-commits
• [llvm] 0411499 - AMDGPU: Use amdgpu triples in llvm-split tests (60) (#209866)   via llvm-commits
• [llvm] AMDGPU: Use amdgpu triples in llvm-split tests (60) (PR #209866)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate KernelInfo tests to new subarch triples (61) (PR #209867)   Matt Arsenault via llvm-commits
• [llvm] Revert "[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt`" (PR #210006)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - ctpop(x) to s_bcnt0_i32 (PR #164847)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Fix APInt truncation assertion (PR #209914)   Hans Wennborg via llvm-commits
• [llvm] Revert "[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt`" (PR #210006)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt`" (PR #210006)   via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   Muhammed Shiyas N via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   Muhammed Shiyas N via llvm-commits
• [llvm] dab4c91 - [TableGen] Optimize register bank and info emission. (#208297)   via llvm-commits
• [llvm] [TableGen] Optimize register bank and info emission. (PR #208297)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Fix load/store legalization for softened x86_fp80 (PR #209991)   Muhammed Shiyas N via llvm-commits
• [llvm] [TableGen] Optimize register bank and info emission. (PR #208297)   via llvm-commits
• [llvm] 88acd42 - AMDGPU: Migrate KernelInfo tests to new subarch triples (61) (#209867)   via llvm-commits
• [llvm] AMDGPU: Migrate KernelInfo tests to new subarch triples (61) (PR #209867)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Convert llvm-reduce tests to new subarch triples (62) (PR #209868)   Matt Arsenault via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Fangrui Song via llvm-commits
• [llvm] [BOLT][RISCV] Support the TLS global-dynamic relocation (PR #209995)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU: Refactor checkVOPDRegConstraints (PR #196514)   Petar Avramovic via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] 9c6a9f5 - [CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (#209581)   via llvm-commits
• [llvm] [CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (PR #209581)   Jacek Caban via llvm-commits
• [llvm] [CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (PR #209581)   Jacek Caban via llvm-commits
• [llvm] [DTLTO] Add remote compiler option forwarding coverage (PR #208589)   Ben Dunbobbin via llvm-commits
• [llvm] [GVN][NFC] Use LoadInst::getProperties() when creating PRE load (PR #208605)   Harrison Hao via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] d94df00 - AMDGPU: Convert llvm-reduce tests to new subarch triples (62) (#209868)   via llvm-commits
• [llvm] AMDGPU: Convert llvm-reduce tests to new subarch triples (62) (PR #209868)   Matt Arsenault via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] AMDGPU: Convert tests to use subarch from triples in the file (PR #209869)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic loads (PR #204556)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Andreas Jonson via llvm-commits
• [llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)   via llvm-commits
• [llvm] [GVN][NFC] Use LoadInst::getProperties() when creating PRE load (PR #208605)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (PR #209883)   Mel Chen via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   via llvm-commits
• [llvm] fb2feeb - [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (#209387)   via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Luke Lau via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   Robert Imschweiler via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Andreas Jonson via llvm-commits
• [llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)   via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Florian Hahn via llvm-commits
• [llvm] [RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (PR #209387)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (PR #209966)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] adc0f68 - AMDGPU: Convert tests to use subarch from triples in the file (#209869)   via llvm-commits
• [llvm] AMDGPU: Convert tests to use subarch from triples in the file (PR #209869)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use subarch in tests using generic arches (PR #209870)   Matt Arsenault via llvm-commits
• [llvm] 9277129 - AMDGPU: Use subarch in tests using generic arches (#209870)   via llvm-commits
• [llvm] AMDGPU: Use subarch in tests using generic arches (PR #209870)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (PR #209966)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (PR #209966)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   Simon Pilgrim via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "uniform", "per-lane" and "imm" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "imm" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "immediate" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "immediate" (PR #209974)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 65180a5 - [VPlan] Relax address constraints during stride analysis (#209168)   via llvm-commits
• [llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)   Mel Chen via llvm-commits
• [llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)   via llvm-commits
• [llvm] [VPlan] Add NegatedMulAccReduction expression-recipe variant (PR #199413)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)   via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)   via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Madhur Kumar via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)   via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   Łukasz Plewa via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   Łukasz Plewa via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Antonio Frighetto via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Antonio Frighetto via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Mel Chen via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Nikita Popov via llvm-commits
• [llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)   Pedro Vicente via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Florian Hahn via llvm-commits
• [llvm] [X86] Interleave independent reductions to share cross-lane extracts (PR #209963)   Pranav Gorantla via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Madhur Amilkanthwar via llvm-commits
• [llvm] [BitcodeReader] Move cached target triple into reader (PR #207740)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] add translation of plugin-specific error codes to Offload API ECs (PR #207208)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Expand affine AddRecs to VPInstructions (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Florian Hahn via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Madhur Amilkanthwar via llvm-commits
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• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] [BOLT][AArch64] Expand cmpbr when reversing would overflow (PR #202998)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Expand cmpbr when reversing would overflow (PR #202998)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Expand cmpbr when reversing would overflow (PR #202998)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Expand cmpbr when reversing would overflow (PR #202998)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Expand cmpbr when reversing would overflow (PR #202998)   Paschalis Mpeis via llvm-commits
• [llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)   Pedro Vicente via llvm-commits
• [llvm] [SLP][NFC] Address follow-up cleanups in SLPUtils (PR #210016)   Madhur Amilkanthwar via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoongArch] Fix invalid VEXTH combines for unsupported type extensions (PR #209725)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [VirtRegMap] Remove unsupported sub-registers during rewrite (PR #201550)   Igor Wodiany via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Florian Hahn via llvm-commits
• [llvm] [LoongArch] Fix invalid VEXTH combines for unsupported type extensions (PR #209725)   via llvm-commits
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• [llvm] [PatternMatch] Add m_SpecificType(Type*) matcher (PR #208427)   Benjamin Jurk via llvm-commits
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• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] 18fc5a8 - [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (#209394)   via llvm-commits
• [llvm] [TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (PR #209394)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (PR #203989)   Martin Storsjö via llvm-commits
• [llvm] [CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (PR #209581)   Martin Storsjö via llvm-commits
• [llvm] [WIP][Don't merge] (PR #210039)   via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Luke Lau via llvm-commits
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• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (PR #209743)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Jay Foad via llvm-commits
• [llvm] [SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC (PR #210045)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC (PR #210045)   via llvm-commits
• [llvm] [libsycl] Fix mock error in unittest helper (PR #209726)   Kseniya Tikhomirova via llvm-commits
• [llvm] 3bf897e - [SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC (PR #210045)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [libsycl] Fix mock error in unittest helper (PR #209726)   Sergey Semenov via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   via llvm-commits
• [llvm] [libsycl] Fix mock error in unittest helper (PR #209726)   Sergey Semenov via llvm-commits
• [libc] [llvm] [libc][WIP] Implement native code coverage pipeline (PR #210046)   Tapiwa Gonga via llvm-commits
• [libc] [llvm] [libc][WIP] Implement native code coverage pipeline (PR #210046)   via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Vassil Vassilev via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
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• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Alex Duran via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   via llvm-commits
• [llvm] [offload] add nodiscard support to offload-tblgen and mark olInit (PR #209727)   Łukasz Plewa via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Jay Foad via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Kamlesh Kumar via llvm-commits
• [llvm] [WIP][Don't merge] (PR #210039)   via llvm-commits
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• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   via llvm-commits
• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Lucas Ramirez via llvm-commits
• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] 66e8cc5 - [ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (#209743)   via llvm-commits
• [llvm] [ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (PR #209743)   Florian Hahn via llvm-commits
• [llvm] [Arch64] Add widening for vector interleave (2/n) (PR #209490)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Madhur Kumar via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Added Downward Propagation for the attribute "amdgpu-agpr-alloc" (PR #208847)   Shilei Tian via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Nikita Popov via llvm-commits
• [clang] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Martin Storsjö via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Luke Lau via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Luke Lau via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Lang Hames via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)   Shanzhi Chen via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Nikita Popov via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Nikita Popov via llvm-commits
• [llvm] [orc-rt] Add asCCallback utility -- C callbacks for methods. (PR #210048)   Lang Hames via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [llvm] [PassBuilder] Remove LoopFullUnrollPass from before LoopVectorize in the FullLTO pipeline (PR #197176)   Nikita Popov via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Nikita Popov via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to Mach-O (PR #210027)   James Henderson via llvm-commits
• [llvm] [X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (PR #210051)   Simon Pilgrim via llvm-commits
• [llvm] [X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (PR #210051)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Update libc/runtime target to use amdgpu (PR #210032)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Wrap SCEVAddRecExprs in VPExpandSCEVRecipe in VPSCEVExpander. (PR #210013)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (PR #209838)   Phoebe Wang via llvm-commits
• [llvm] [orc-rt] Add asCCallback utility -- C callbacks for methods. (PR #210048)   Lang Hames via llvm-commits
• [llvm] [SPIRV] Fix crash when lowering functions with aggregate return types (PR #209027)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix crash when lowering functions with aggregate return types (PR #209027)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Dmitry Sidorov via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add missing FMF flags in tests (NFC) (PR #210055)   Nikita Popov via llvm-commits
• [llvm] 6388cfc - [AMDGPU] Add missing FMF flags in tests (NFC) (#210055)   via llvm-commits
• [llvm] [AMDGPU] Add missing FMF flags in tests (NFC) (PR #210055)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Fix crash when lowering functions with aggregate return types (PR #209027)   Dmitry Sidorov via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   Matthias Gehre via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   via llvm-commits
• [llvm] [X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (PR #209838)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Dmitry Sidorov via llvm-commits
• [llvm] [X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (PR #209838)   Simon Pilgrim via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Peter Smith via llvm-commits
• [llvm] [offload] add nodiscard support to offload-tblgen and mark olInit (PR #209727)   Joseph Huber via llvm-commits
• [compiler-rt] [tsan][go]: add a128 store, load, compare_exchange (PR #196833)   Mauri de Souza Meneguzzo via llvm-commits
• [compiler-rt] [tsan][go]: add a128 store, load, compare_exchange (PR #196833)   Mauri de Souza Meneguzzo via llvm-commits
• [compiler-rt] [tsan] Enable __TSAN_HAS_INT128 on s390x and mips64 (PR #197319)   Mauri de Souza Meneguzzo via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   via llvm-commits
• [llvm] [AMDGPU] Simplify some isVALU calls. NFC. (PR #210057)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify some isVALU calls. NFC. (PR #210057)   via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   Abhina Sree via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   via llvm-commits
• [llvm] [NFC][test][AliasSet] Canonicalise memset.ll's overload suffices (PR #210059)   Jessica Clarke via llvm-commits
• [llvm] 424fec2 - [NFC][test][AliasSet] Canonicalise memset.ll's overload suffices (#210059)   via llvm-commits
• [llvm] [NFC][test][AliasSet] Canonicalise memset.ll's overload suffices (PR #210059)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [OFFLOAD][L0][NFC] Cleanup dead code (PR #210060)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD][L0][NFC] Cleanup dead code (PR #210060)   via llvm-commits
• [llvm] [SROA] Pre-split overlapping move slices within a partition (PR #210061)   John Brawn via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   Abhina Sree via llvm-commits
• [llvm] [SROA] Pre-split overlapping move slices within a partition (PR #210061)   via llvm-commits
• [llvm] [OFFLOAD][L0][NFC] Cleanup dead code (PR #210060)   Łukasz Plewa via llvm-commits
• [llvm] [SROA] Pre-split overlapping move slices within a partition (PR #210061)   via llvm-commits
• [llvm] [NFC][LV] Separate control-flow masking from tail-folding masking. (PR #169509)   Sander de Smalen via llvm-commits
• [llvm] [OFFLOAD][L0][NFC] Cleanup dead code (PR #210060)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD][L0][NFC] Cleanup dead code (PR #210060)   Alex Duran via llvm-commits
• [llvm] 6ba12f1 - [X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (#210051)   via llvm-commits
• [llvm] [X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (PR #210051)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Madhur Kumar via llvm-commits
• [llvm] [yaml2obj] Apply output size limit to Mach-O (PR #210027)   via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Marcos Maronas via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #209714 (PR #210063)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   Adam Scott via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] 1959535 - [X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (#209838)   via llvm-commits
• [llvm] [X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (PR #209838)   Simon Pilgrim via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (PR #210066)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (PR #210066)   via llvm-commits
• [llvm] [AMDGPU] Testing cleanup in prep for true16 test upstreaming (PR #209888)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Testing cleanup in prep for true16 test upstreaming (PR #209888)   Domenic Nutile via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [AMDGPU] Testing cleanup in prep for true16 test upstreaming (PR #209888)   Domenic Nutile via llvm-commits
• [llvm] [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (PR #209879)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (PR #210066)   Pierre van Houtryve via llvm-commits
• [llvm] [ARM][Thumb1] Verify EstimateFunctionSizeInBytes every time (PR #203319)   Simon Tatham via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [libc] [llvm] [libc] Port process utilities to hermetic mode and enable some tests (PR #209999)   via llvm-commits
• [llvm] [VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (PR #208993)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [VPlan] Fold ALM with const operands (PR #208852)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Nick Sarnie via llvm-commits
• [llvm] [Bazel] Fixes e3d3b3b (PR #210068)   via llvm-commits
• [llvm] [PatternMatch] Add m_SpecificType(Type*) matcher (PR #208427)   Yingwei Zheng via llvm-commits
• [llvm] [Bazel] Fixes e3d3b3b (PR #210068)   via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] [AMDGPU] Simplify some isVALU calls. NFC. (PR #210057)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Shilei Tian via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Sergey Semenov via llvm-commits
• [clang] [llvm] [AMDGPU] Guard more intrinsics with target features (PR #203956)   Shilei Tian via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Alex Duran via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [clang] [llvm] AMDGPU: Use module flags to control xnack and sramecc (PR #204595)   Shilei Tian via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Diego Novillo via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Diego Novillo via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Diego Novillo via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Nick Sarnie via llvm-commits
• [llvm] 1cb7e83 - [AMDGPU] Simplify some isVALU calls. NFC. (#210057)   via llvm-commits
• [llvm] [AMDGPU] Simplify some isVALU calls. NFC. (PR #210057)   Jay Foad via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [clang] [llvm] AMDGPU: Use module flags to control xnack and sramecc (PR #204595)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (PR #210066)   Jay Foad via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] Improve amdgcn_kill verification (PR #208220)   Shilei Tian via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Joseph Huber via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [Bazel] Fixes e3d3b3b (PR #210068)   via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Shilei Tian via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] Preserve the result number of a statepoint call target (PR #205364)   via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Yingwei Zheng via llvm-commits
• [llvm] [SLP]Make the instruction-count check loop-aware (PR #210074)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   James Y Knight via llvm-commits
• [llvm] [SLP]Make the instruction-count check loop-aware (PR #210074)   via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc] Migrate printf_core from stdio/ to __support/. (PR #208303)   Alex Strelnikov via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Shilei Tian via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Sayan Sivakumaran via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Jay Foad via llvm-commits
• [llvm] 6e7ff09 - [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (#210066)   via llvm-commits
• [llvm] [AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (PR #210066)   Jay Foad via llvm-commits
• [llvm] c7a5b9c - [LoopIdiomRecognize] Enable clmul optimization for CRC loops (#203405)   via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [SLP]Add umax/umin/smax/smin as main opcodes for copyables (PR #209326)   Alexey Bataev via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Florian Hahn via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
• [llvm] 0852ac5 - [PowerPC] Remove itinerary IIC_LdStDCBA (#207227)   via llvm-commits
• [llvm] [PowerPC] Remove itinerary IIC_LdStDCBA (PR #207227)   Kai Nacke via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [Arch64] Add widening for vector interleave (2/n) (PR #209490)   Kamlesh Kumar via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Krzysztof Drewniak via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] 96cab30 - [AMDGPU] Improve amdgcn_kill verification (#208220)   via llvm-commits
• [llvm] [AMDGPU] Improve amdgcn_kill verification (PR #208220)   Robert Imschweiler via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Florian Hahn via llvm-commits
• [llvm] [SLP] Gather operands of associative binary chains into one node (PR #208514)   Alexey Bataev via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Florian Hahn via llvm-commits
• [llvm] 8c22bbd - [RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (#209088)   via llvm-commits
• [llvm] [RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (PR #209088)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Paul Walker via llvm-commits
• [llvm] [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (PR #209964)   Craig Topper via llvm-commits
• [llvm] [ConstraintElim] Add trunc nuw support to condition checks (PR #209844)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Nikita Popov via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [SLP] Enable full non-power-of-2 vectorization by default (PR #199450)   Alexey Bataev via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   Craig Topper via llvm-commits
• [llvm] 0067404 - [PatternMatch] Add m_SpecificType(Type*) matcher (#208427)   via llvm-commits
• [llvm] [PatternMatch] Add m_SpecificType(Type*) matcher (PR #208427)   Nikita Popov via llvm-commits
• [llvm] [PatternMatch] Add m_SpecificType(Type*) matcher (PR #208427)   via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [lld] [LLD][COFF] Add support for importing ARM64X images (PR #210080)   Jacek Caban via llvm-commits
• [llvm] [ConstraintElim] Look through post-increment in header EQ/NE compare. (PR #209199)   Florian Hahn via llvm-commits
• [lld] [LLD][COFF] Add support for importing ARM64X images (PR #210080)   via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   Ikhlas Ajbar via llvm-commits
• [llvm] [libsycl] fix nd_range template resolution (PR #210081)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   LLVM Continuous Integration via llvm-commits
• [llvm] [Bazel] Fixes e3d3b3b (PR #210068)   Jordan Rupprecht via llvm-commits
• [llvm] [libsycl] fix nd_range template resolution (PR #210081)   Sergey Semenov via llvm-commits
• [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)   Anshil Gandhi via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)   Anshil Gandhi via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [RISCV] Don't overcost wide load in optimized segment load/store (PR #207146)   Luke Lau via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [LLD][COFF] Add support for importing ARM64X images (PR #210080)   via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] [OFFLOAD][L0] Don't return error on initImpl if library/drivers are missing (PR #210083)   Alex Duran via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Sam Elliott via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   via llvm-commits
• [llvm] [OFFLOAD][L0] Don't return error on initImpl if library/drivers are missing (PR #210083)   via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Craig Topper via llvm-commits
• [libc] [llvm] [libc] Migrate printf_core from stdio/ to __support/. (PR #208303)   Alex Strelnikov via llvm-commits
• [llvm] [OFFLOAD][L0] Don't return error on initImpl if library/drivers are missing (PR #210083)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Shilei Tian via llvm-commits
• [llvm] [LLVM][SVE] Convert FFR intrinsic definition to use IntrRead/IntrWrite. (PR #210084)   Paul Walker via llvm-commits
• [llvm] [LLVM][SVE] Convert FFR intrinsic definition to use IntrRead/IntrWrite. (PR #210084)   via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Sam Elliott via llvm-commits
• [llvm] 9ec7974 - [AMDGPU] Update libc/runtime target to use amdgpu (#210032)   via llvm-commits
• [llvm] [AMDGPU] Update libc/runtime target to use amdgpu (PR #210032)   via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #209714 (PR #210063)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Sayan Sivakumaran via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Jay Foad via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Craig Topper via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Paul Kirth via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Paul Kirth via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Paul Kirth via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   zhijian lin via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Deepak Shirke via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [lld] [LLD][COFF] Add support for importing ARM64X images (PR #210080)   Jacek Caban via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Brandon Wu via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   via llvm-commits
• [llvm] [llvm][RISCV] Tune lowerSelect on zicond for code size (PR #210026)   Brandon Wu via llvm-commits
• [llvm] [HashRecognize] Apply byte-multiple trip count requirement only to table lookup optimization (PR #210086)   Sean Clarke via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Brandon Wu via llvm-commits
• [llvm] [HashRecognize] Apply byte-multiple trip count requirement only to table lookup optimization (PR #210086)   via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Shilei Tian via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   Paul Kirth via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   Paul Kirth via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   Paul Kirth via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   Paul Kirth via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   Jeff Bailey via llvm-commits
• [llvm] [HashRecognize] Remove byte-multiple trip count requirement (PR #210086)   Sean Clarke via llvm-commits
• [llvm] 8f0a479 - [Instrumentor] Fix indirect arguments on gpu targets (#209835)   via llvm-commits
• [llvm] [Instrumentor] Fix indirect arguments on gpu targets (PR #209835)   Kevin Sala Penades via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [llvm] [Instrumentor] Fix indirect arguments on gpu targets (PR #209835)   via llvm-commits
• [llvm] Add an LTO run to the quant_4x4 phase ordering test (NFC) (PR #210088)   Momchil Velikov via llvm-commits
• [llvm] Modify lit config to allow specify extra env vars to pass through to lit invocation (PR #208239)   David Peixotto via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] [ObjCARC] Move autorelease-to-release conversion to pool pop site instead of converting in place (PR #152353)   via llvm-commits
• [llvm] Add an LTO run to the quant_4x4 phase ordering test (NFC) (PR #210088)   via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Florian Hahn via llvm-commits
• [llvm] f57bdc6 - [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (#210033)   via llvm-commits
• [llvm] [ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (PR #210033)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Jay Foad via llvm-commits
• [llvm] [DWARFLinker] Make synthetic type names deterministic under threading (PR #209553)   Jonas Devlieghere via llvm-commits
• [llvm] [DWARFLinker] Fix RefTypeName crash and type-table non-determinism (PR #209033)   Jonas Devlieghere via llvm-commits
• [llvm] [DWARFLinker] Fix data race on the per-unit file-name cache (PR #208967)   Jonas Devlieghere via llvm-commits
• [llvm] c9ec54a - [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (#209964)   via llvm-commits
• [llvm] [RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (PR #209964)   Craig Topper via llvm-commits
• [clang] [llvm] [clang] report inlining decisions with -Wattribute-{warning|error} (PR #73552)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [clang] report inlining decisions with -Wattribute-{warning|error} (PR #73552)   Nick Desaulniers via llvm-commits
• [llvm] [PassBuilder] Remove LoopFullUnrollPass from before LoopVectorize in the FullLTO pipeline (PR #197176)   Momchil Velikov via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [inlineasm] Improve support for multiple inline asm constraints (e.g. "rm") (PR #197798)   Nick Desaulniers via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [libc] [llvm] [libc] stop including unistd.h in src/ (PR #85971)   Nick Desaulniers via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [llvm] a5b7090 - [AMDGPU] Guard more intrinsics with target features (#203956)   via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   Florian Hahn via llvm-commits
• [clang] [llvm] [AMDGPU] Guard more intrinsics with target features (PR #203956)   Shilei Tian via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [clang] [llvm] [inlineasm] Improve support for multiple inline asm constraints (e.g. "rm") (PR #197798)   Eric Christopher via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   David CARLIER via llvm-commits
• [llvm] [libsycl] fix nd_range template resolution (PR #210081)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Implement nd_range kernel submissions (PR #206505)   Kseniya Tikhomirova via llvm-commits
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• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Jay Foad via llvm-commits
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• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Alexis Engelke via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (PR #204820)   Paul Walker via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   Michael Jones via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)   Lukas Sommer via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Fangrui Song via llvm-commits
• [llvm] 694c561 - [CycleInfo] Store cycles in a flat preorder array. NFC (#209981)   via llvm-commits
• [llvm] [CycleInfo] Store cycles in a flat preorder array. NFC (PR #209981)   Fangrui Song via llvm-commits
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• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [NFC] Pre-commit a test case for a SimplifyCFG issue (PR #204957)   Shilei Tian via llvm-commits
• [clang] [llvm] [NVPTX] Support short entry param pointers (PR #206512)   Alex MacLean via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [RISCV][P-ext] Make undef vectors Legal. (PR #210106)   Craig Topper via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   via llvm-commits
• [llvm] [NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (PR #209952)   Alex MacLean via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Alexander Richardson via llvm-commits
• [llvm] [RISCV][P-ext] Make undef vectors Legal. (PR #210106)   via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Alexander Richardson via llvm-commits
• [llvm] workflows/release-binaries: Checkout validate-release-version in upload step (PR #209246)   Tom Stellard via llvm-commits
• [llvm] [UniformityAnalysis] Make divergent-exit cycle print order deterministic (PR #210107)   Fangrui Song via llvm-commits
• [llvm] [UniformityAnalysis] Make divergent-exit cycle print order deterministic (PR #210107)   Fangrui Song via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [RISCV][P-ext] Make undef vectors Legal. (PR #210106)   via llvm-commits
• [llvm] workflows/llvm-abi-tests: Fix typo (PR #209917)   via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Farid Zakaria via llvm-commits
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• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Farid Zakaria via llvm-commits
• [llvm] [libsycl][NFC] Move the cmake msvc DLL check (PR #193485)   Sergey Semenov via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   via llvm-commits
• [llvm] [LoadStoreVectorizer] Avoid vectorizing pointers with external state (PR #209909)   Drew Kersnar via llvm-commits
• [llvm] [RISCV] Use MCRegister. NFC (PR #210110)   Craig Topper via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Farid Zakaria via llvm-commits
• [llvm] [RISCV] Use MCRegister. NFC (PR #210110)   via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Farid Zakaria via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [llvm] [mlir] Openacc bootstrap (PR #209691)   via llvm-commits
• [clang] [llvm] Delegate __builtin_setjmp SP and FP save to the backend on all targets (PR #186843)   Pyry Kovanen via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [clang] [llvm] Delegate __builtin_setjmp SP and FP save to the backend on all targets (PR #186843)   Pyry Kovanen via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   Alina Sbirlea via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   Alina Sbirlea via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   Alina Sbirlea via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   Alina Sbirlea via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Jessica Clarke via llvm-commits
• [llvm] [libsycl][E2E] Compile all E2E tests with -fsycl (PR #204115)   Sergey Semenov via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [llvm] ab5e015 - [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (#209990)   via llvm-commits
• [llvm] [CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (PR #209990)   Fangrui Song via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Craig Topper via llvm-commits
• [llvm] [LV] Reduce register pressure of RISC-V outer loop reduction. (PR #208621)   Florian Hahn via llvm-commits
• [llvm] [CodeGen][X86] Honor LargeEHEncoding when selecting x86-64 EH encoding (PR #210109)   Jessica Clarke via llvm-commits
• [llvm] Arm ropi rwpi dynreloc consts (PR #207931)   Eli Friedman via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Mariusz Borsa via llvm-commits
• [llvm] 0d37efa - SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (#209977)   via llvm-commits
• [llvm] SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (PR #209977)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Sam Elliott via llvm-commits
• [llvm] 4a578be - PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (#209972)   via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Mariusz Borsa via llvm-commits
• [llvm] PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (PR #209972)   Matt Arsenault via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Mariusz Borsa via llvm-commits
• [llvm] [Docs] Migrate LLVM docs to furo (PR #184440)   Fangrui Song via llvm-commits
• [llvm] 2fc864b - AMDGPU: Use subarch triples in more unit tests (#210011)   via llvm-commits
• [llvm] AMDGPU: Use subarch triples in more unit tests (PR #210011)   Matt Arsenault via llvm-commits
• [clang] [llvm] Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (PR #194616)   Ricardo Jesus via llvm-commits
• [llvm] [RISCV] Use MCRegister. NFC (PR #210110)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   via llvm-commits
• [llvm] AMDGPU: Migrate more tests to amdgpu triples (PR #210113)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [llvm] [CFI] Create an external linkage alias instead of promoting internals (PR #203171)   Mircea Trofin via llvm-commits
• [llvm] AMDGPU: Migrate more tests to amdgpu triples (PR #210113)   Matt Arsenault via llvm-commits
• [llvm] Arm ropi rwpi dynreloc consts (PR #207931)   Peter Smith via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Kelvin Li via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [llvm] AMDGPU: Migrate more tests to amdgpu triples (PR #210113)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add ptr.s.buffer.load intrinsic, use it from Clang (PR #209243)   Scott Linder via llvm-commits
• [llvm] AMDGPU: Migrate more tests to amdgpu triples (PR #210113)   via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Matt Arsenault via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Make divergent-exit cycle print order deterministic (PR #210107)   Fangrui Song via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   Wael Yehia via llvm-commits
• [llvm] 4180e2b - [UniformityAnalysis] Make divergent-exit cycle print order deterministic (#210107)   via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Make divergent-exit cycle print order deterministic (PR #210107)   Fangrui Song via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   via llvm-commits
• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   Muhammad Bassiouni via llvm-commits
• [llvm] cross-project-tests: Migrate amdgpu tests to use subarch triples (PR #210115)   Matt Arsenault via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [polly] Isl ast gen compute out (PR #201859)   Shikhar Jain via llvm-commits
• [llvm] [WebAssembly] Don't assert on a non-zero call_indirect table index (PR #210120)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Louis Dionne via llvm-commits
• [llvm] [WebAssembly] Don't assert on a non-zero call_indirect table index (PR #210120)   via llvm-commits
• [llvm] Migrate away from legacy external runfiles (PR #203650)   via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] Account for aliasing reads in RewriteOutArguments (PR #209908)   via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Sam Elliott via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   Sophia Herrmann via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   zhijian lin via llvm-commits
• [llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)   Kamlesh Kumar via llvm-commits
• [llvm] Arm ropi rwpi dynreloc consts (PR #207931)   Eli Friedman via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)   zhijian lin via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   Sophia Herrmann via llvm-commits
• [llvm] dd2e6e0 - [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (#210104)   via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   Alexander Richardson via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   Sophia Herrmann via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   Zachary Henkel via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [libc++] Run macOS CI on self-hosted runners instead of Github ones (PR #210124)   Louis Dionne via llvm-commits
• [llvm] [libc++] Run macOS CI on self-hosted runners instead of Github ones (PR #210124)   via llvm-commits
• [llvm] [libc++] Run macOS CI on self-hosted runners instead of Github ones (PR #210124)   Mishal Shah via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Joseph Huber via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Joseph Huber via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Joseph Huber via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Joseph Huber via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   via llvm-commits
• [compiler-rt] [compiler-rt][memprof] clear histogram tail granule on allocation. (PR #208911)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] Support Windows GNU sanitizer runtimes (PR #209902)   via llvm-commits
• [compiler-rt] 6563d25 - [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (#209971)   via llvm-commits
• [compiler-rt] [sanitizer_common] fix shadowed ret hiding symbolizer read failures. (PR #209971)   David CARLIER via llvm-commits
• [llvm] Reland "[MergeFunctions] Preserve instruction-level profile metadata during merging" (#208009) (PR #210138)   Alok Kumar Sharma via llvm-commits
• [compiler-rt] e1fa984 - [Sanitizers][Darwin] Add atos-canary test (#209338)   via llvm-commits
• [compiler-rt] [Sanitizers][Darwin] Add atos-canary test (PR #209338)   Mariusz Borsa via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Krzysztof Drewniak via llvm-commits
• [llvm] [InstCombine] Fold (X * (C+1)) / C -> X + X / C (PR #210136)   via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   Peter Smith via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Matt Arsenault via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Matt Arsenault via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [llvm] [AMDGPU] Split large raw buffer offsets to SOFFSET where allowed (PR #207821)   Krzysztof Drewniak via llvm-commits
• [llvm] [RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (PR #210104)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Joshua Batista via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   via llvm-commits
• [clang] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Matt Arsenault via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Arthur Eubanks via llvm-commits
• [llvm] a11e372 - [RISCV][P-ext] Remove redundant shuffle lowering for packed widening high-half convert. (#210128)   via llvm-commits
• [llvm] [RISCV][P-ext] Remove redundant shuffle lowering for packed widening high-half convert. (PR #210128)   Craig Topper via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with computeDependence fix (PR #208012)   John Paul Jepko via llvm-commits
• [llvm] [SLP][NFC]Add a test with GEPs under the same select condition, NFC (PR #210173)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test with GEPs under the same select condition, NFC (PR #210173)   via llvm-commits
• [llvm] 58db4ce - [SLP][NFC]Add a test with GEPs under the same select condition, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with GEPs under the same select condition, NFC (PR #210173)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i32 to SALU insts (PR #210168)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i32 to SALU insts (PR #210168)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   via llvm-commits
• [llvm] 7cfe30d - [TableGen] Short-circuit !cond operator (#208942)   via llvm-commits
• [llvm] [TableGen] Short-circuit !cond operator (PR #208942)   Sam Elliott via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [flang] [llvm] [fakeflang] Also detect CMakeTestGNU.c (PR #210175)   Michael Kruse via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   David Li via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Vitaly Buka via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Pranav Kant via llvm-commits
• [compiler-rt] aaa4ebd - [Clang][Sema] Reland -Wstringop-overread with computeDependence fix (#208012)   via llvm-commits
• [clang] [compiler-rt] [Clang][Sema] Reland -Wstringop-overread with computeDependence fix (PR #208012)   via llvm-commits
• [flang] [llvm] [fakeflang] Also detect CMakeTestGNU.c (PR #210175)   Jan Patrick Lehr via llvm-commits
• [lld] [LLD][COFF] Add support for importing ARM64X images (PR #210080)   Martin Storsjö via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRAttributes; use for VPWidenCallRecipe. (PR #207075)   Florian Hahn via llvm-commits
• [llvm] CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (PR #210176)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (PR #210176)   Matt Arsenault via llvm-commits
• [llvm] 68f703f - [AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (#203989)   via llvm-commits
• [clang] [llvm] [AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (PR #203989)   Martin Storsjö via llvm-commits
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• [llvm] Add expression validation tests for DW_OP_swap (PR #210184)   Eric Christopher via llvm-commits
• [llvm] [docs] Rename selected LLVM docs to Markdown (PR #208800)   Reid Kleckner via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
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• [llvm] eb819b9 - [SLP][NFC]Add a test with incorrect nsw in reordered sub feeding equal cmp, NFC   via llvm-commits
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• [compiler-rt] [flang] [libunwind] [lldb] [llvm] [docs] Rename misc rst docs to md (PR #210208)   Reid Kleckner via llvm-commits
• [compiler-rt] [flang] [libunwind] [lldb] [llvm] [docs] Rename misc rst docs to md (PR #210208)   via llvm-commits
• [llvm] 5337314 - [WebAssembly] Port WebAssemblySetP2AlignOperandsPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblySetP2AlignOperandsPass (PR #209871)   Aiden Grossman via llvm-commits
• [llvm] [SROA] Fix assertion failure when promoting self-referential load/store (PR #208826)   Krisitan Erik Olsen via llvm-commits
• [llvm] 2494e80 - [WebAssembly] Port WebAssemblyFixBrTableDefaultsPass   via llvm-commits
• [llvm] d0dd060 - [NFC] Use new target triple for some tests (#210202)   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixBrTableDefaultsPass (PR #209882)   Aiden Grossman via llvm-commits
• [llvm] [NFC] Use new target triple for some tests (PR #210202)   Shilei Tian via llvm-commits
• [llvm] [NFC] Use new target triple for some tests (PR #210202)   Shilei Tian via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyFixBrTableDefaultsPass (PR #209882)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCleanCodeAfterTrapPass (PR #209892)   Aiden Grossman via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Craig Topper via llvm-commits
• [llvm] 565ef24 - [WebAssembly] Port WebAssemblyCleanCodeAfterTrapPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCleanCodeAfterTrapPass (PR #209892)   Aiden Grossman via llvm-commits
• [llvm] [docs] Finish MyST migration for BOLT docs (PR #210199)   Reid Kleckner via llvm-commits
• [llvm] [docs] Finish MyST migration for BOLT docs (PR #210199)   Reid Kleckner via llvm-commits
• [llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)   Craig Topper via llvm-commits
• [llvm] [LLVM] Fix not passing CMAKE_CROSSCOMPILING_EMULATOR for amdgpu (PR #209828)   LLVM Continuous Integration via llvm-commits
• [llvm] [docs] Finish MyST migration for BOLT docs (PR #210199)   Reid Kleckner via llvm-commits
• [llvm] [NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (PR #209952)   Reid Kleckner via llvm-commits
• [llvm] [llvm-libtool-darwin] Ensure filelist buffer is null-terminated (PR #205115)   Alexander Shaposhnikov via llvm-commits
• [llvm] [SLP][NFC]Fix non-determinism in pointers comparison, NFC (PR #210216)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Fix non-determinism in pointers comparison, NFC (PR #210216)   via llvm-commits
• [clang] [llvm] [NFC][OpenMP] Add mapper-specific tests exercising pointee seciton mapping. (PR #204269)   Abhinav Gaba via llvm-commits
• [llvm] 9f839a4 - [SLP][NFC]Fix non-determinism in pointers comparison, NFC   via llvm-commits
• [llvm] [SLP][NFC]Fix non-determinism in pointers comparison, NFC (PR #210216)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209820)   Alexey Bataev via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Petr Hosek via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Petr Hosek via llvm-commits
• [llvm] [BOLT] Drop option --instrument-funcs-file (PR #210217)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Drop option --instrument-funcs-file (PR #210217)   via llvm-commits
• [llvm] [Offload][OpenMP] Fix RPC callback registration when RPC server is not initialized (PR #210215)   Joseph Huber via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   Haohai Wen via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Aiden Grossman via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold (X * (C+1)) / C -> X + X / C (PR #210136)   via llvm-commits
• [llvm] [InstCombine] Fold (X * (C+1)) / C -> X + X / C (PR #210136)   via llvm-commits
• [llvm] [BOLT] Support --lite selection with basic sample profiles (PR #210226)   Daniel Hill via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat to SALU instructions (PR #210156)   Anshil Gandhi via llvm-commits
• [llvm] [BOLT] Support --lite selection with basic sample profiles (PR #210226)   via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   dong jianqiang via llvm-commits
• [llvm] [InstCombine] Fold lshr/ashr (mul X, 2^N + 2^M) -> add (X, lshr/ashr X, N - M) (PR #210140)   via llvm-commits
• [llvm] [bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (PR #210222)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (PR #210222)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (PR #210222)   Jordan Rupprecht via llvm-commits
• [llvm] 9d2181c - [NFC] Reuse DwarfExpression fragment (#210181)   via llvm-commits
• [llvm] [NFC] Reuse DwarfExpression fragment (PR #210181)   Eric Christopher via llvm-commits
• [llvm] [bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (PR #210222)   Jordan Rupprecht via llvm-commits
• [lld] [docs] Rename LLD docs to Markdown (PR #209894)   Yanzuo Liu via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   Brian Cain via llvm-commits
• [llvm] 27d7b61 - [GVN][NFC] Use LoadInst::getProperties() when creating PRE load (#208605)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic loads (PR #204556)   Harrison Hao via llvm-commits
• [llvm] [GVN][NFC] Use LoadInst::getProperties() when creating PRE load (PR #208605)   Harrison Hao via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [llvm] [LangRef] Clarify what "not ordered" means in the elementwise description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] 4a75259 - [LoongArch] Fix invalid VEXTH combines for unsupported type extensions (#209725)   via llvm-commits
• [llvm] [LoongArch] Fix invalid VEXTH combines for unsupported type extensions (PR #209725)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   Kane Wang via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Prasoon Kumar via llvm-commits
• [llvm] [NVPTX] change fp128 operation crashes to diagnostics. (PR #191636)   via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   Vitaly Buka via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   Vitaly Buka via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   Vitaly Buka via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   Haohai Wen via llvm-commits
• [llvm] 8aaa15e - [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (#205991)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   Haohai Wen via llvm-commits
• [llvm] [SampleProfile] Support MD5-based ProfileSymbolList (PR #210235)   Kazu Hirata via llvm-commits
• [llvm] [SampleProfile] Support MD5-based ProfileSymbolList (PR #210235)   via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Feng Zou via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Vlad Serebrennikov via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   Ikhlas Ajbar via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (PR #209973)   Madhur Amilkanthwar via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (PR #209973)   Madhur Amilkanthwar via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   Tom Stellard via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Feng Zou via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Feng Zou via llvm-commits
• [llvm] [Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (PR #209986)   via llvm-commits
• [compiler-rt] [compiler-rt][ubsan] Fix suppressions for inlined functions (PR #206735)   Vitaly Buka via llvm-commits
• [llvm] workflows: Fixes for release-binaries and upload-release-artifact (PR #209246)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [clang] [compiler-rt] [llvm] [UBSan] Add -fsanitize=uninitialized-read check (ISO C 6.3.2.1p2) (PR #207529)   via llvm-commits
• [clang] [compiler-rt] [llvm] [UBSan] Add -fsanitize=uninitialized-read check (ISO C 6.3.2.1p2) (PR #207529)   via llvm-commits
• [llvm] [ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (PR #205991)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   Craig Topper via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Mishal Shah via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] f2ef567 - [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (#169213)   via llvm-commits
• [llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)   Carl Ritson via llvm-commits
• [clang] [compiler-rt] [llvm] [UBSan] Add -fsanitize=uninitialized-read check (ISO C 6.3.2.1p2) (PR #207529)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Luke Lau via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (PR #209983)   Craig Topper via llvm-commits
• [llvm] 15ae01d - [clangd][Support] Outline LSP payload decode errors (#203121)   via llvm-commits
• [llvm] Reapply "[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns" (#199371) (PR #208999)   Adam Scott via llvm-commits
• [compiler-rt] [compiler-rt] Move sanitizer ignorelists to sanitizer-ignorelists target (PR #200518)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
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• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [libc] [llvm] [libc][bazel] Add remaining sys/socket functions and tests (PR #209798)   Pavel Labath via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for interop construct (PR #203959)   Sairudra More via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Timm Baeder via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for interop construct (PR #203959)   Sairudra More via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [clang-tools-extra] [llvm] [clangd][Support] Outline LSP payload decode errors (PR #203121)   LLVM Continuous Integration via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Refactor SampleProfileNameTable into a polymorphic class hierarchy (NFC) (PR #210252)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Refactor SampleProfileNameTable into a polymorphic class hierarchy (NFC) (PR #210252)   via llvm-commits
• [llvm] [ProfileData] Remove clear() from SampleProfileNameTable (NFC) (PR #209335)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Remove clear() from SampleProfileNameTable (NFC) (PR #209335)   Kazu Hirata via llvm-commits
• [llvm] Turn signal handling on in LineEditor (PR #203616)   Jeaye Wilkerson via llvm-commits
• [libc] [llvm] [libc] Port process utilities to hermetic mode and enable some tests (PR #209999)   Pavel Labath via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [llvm] 61fa8d3 - CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (#210176)   via llvm-commits
• [llvm] CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (PR #210176)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] [SelectionDAG] Lower constant i128 UREM without a libcall (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AMDGPU] [SelectionDAG] Lower constant i128 UREM without a libcall (PR #210232)   via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for XiangShan-KunMingHu (PR #148581)   Lin Wang via llvm-commits
• [llvm] [LLVM][Verifier] Remove constant-only matrix stride check (PR #207665)   via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   Fangrui Song via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [ADT] Introduce SetVector::reserve (NFC) (PR #209951)   Kazu Hirata via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for XiangShan-KunMingHu (PR #148581)   Craig Topper via llvm-commits
• [lld] [LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (PR #210080)   Martin Storsjö via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [flang] [llvm] [fakeflang] Also detect CMakeTestGNU.c (PR #210175)   Michael Kruse via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   Nikita Popov via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Heejin Ahn via llvm-commits
• [llvm] [LLVM][Verifier] Remove constant-only matrix stride check (PR #207665)   Nikita Popov via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed int-to-double/float builtins (PR #209900)   via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Verifier] Remove constant-only matrix stride check (PR #207665)   Nikita Popov via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [libc] [llvm] [compiler-rt][builtins] add libc-backed arithmetic builtins (PR #207092)   via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   via llvm-commits
• [compiler-rt] [libc] [llvm] [compiler-rt][builtins] add libc-backed arithmetic builtins (PR #207092)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Simon Pilgrim via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [llvm] [llvm] Add Trusty OSType (PR #210119)   Fangrui Song via llvm-commits
• [llvm] 90e31c4 - [LTO] Sort DefinedGlobals in LTO cache key (#210025)   via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   via llvm-commits
• [llvm] [llvm-readobj] Print all callgraph sections (PR #198929)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] Print all callgraph sections (PR #198929)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] Print all callgraph sections (PR #198929)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] Print all callgraph sections (PR #198929)   James Henderson via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more inline {memcpy,memmove} tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more inline {memcpy,memmove} tests (NFC) (PR #210263)   via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more inline {memcpy,memmove} tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [clang] [libcxxabi] [libunwind] [llvm] [WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (PR #209282)   Demetrius Kanios via llvm-commits
• [llvm] [TableGen] Diagnose sub-register indices that overflow their register (PR #206346)   Taimuraz Kaitmazov via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Martin Storsjö via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Martin Storsjö via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Martin Storsjö via llvm-commits
• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   via llvm-commits
• [llvm] [LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (PR #210267)   Sharjeel Khan via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] [VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (PR #209883)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (PR #210267)   via llvm-commits
• [llvm] [AMDGPU] Handle expert scheduling VA_VDST WAR hazards (PR #201619)   Jay Foad via llvm-commits
• [llvm] 8b26958 - [VectorCombine][X86] Add test coverage for #209714 (#210063)   via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #209714 (PR #210063)   Simon Pilgrim via llvm-commits
• [llvm] [LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (PR #210267)   Sharjeel Khan via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64][GlobalISel] Add sign bits for G_VASHR (PR #210269)   Joel Walker via llvm-commits
• [llvm] [AArch64][GlobalISel] Add sign bits for G_VASHR (PR #210269)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add sign bits for G_VASHR (PR #210269)   via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   via llvm-commits
• [llvm] [CycleInfo] Reference cycles by preorder index, not pointer. NFC (PR #210271)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Lower uniform usubsat to SOP (PR #203155)   Jay Foad via llvm-commits
• [llvm] [CycleInfo] Reference cycles by preorder index, not pointer. NFC (PR #210271)   via llvm-commits
• [clang] [llvm] [AArch64][Driver] Fix behavior of +nofeat modifier on -mcpu (PR #203458)   via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [LTO] Sort DefinedGlobals in LTO cache key (PR #210025)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i32 to SALU insts (PR #210168)   Jay Foad via llvm-commits
• [compiler-rt] [flang] [libunwind] [lldb] [llvm] [docs] Rename misc rst docs to md (PR #210208)   David Spickett via llvm-commits
• [llvm] [AArch64] Add lowering for fixed-vector bf16 masked gather/scatter. (PR #210273)   David Green via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [llvm] [AArch64] Add lowering for fixed-vector bf16 masked gather/scatter. (PR #210273)   via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   via llvm-commits
• [llvm] [BOLT] Drop option --instrument-funcs-file (PR #210217)   Paschalis Mpeis via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invariant (PR #192902)   Ashutosh Nema via llvm-commits
• [llvm] [AMDGPU][True16] Select _t16 D16 loads/stores for FLAT/GLOBAL/SCRATCH (PR #210191)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16] Select _t16 D16 loads/stores for FLAT/GLOBAL/SCRATCH (PR #210191)   Jay Foad via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   Mitch Briles via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [llvm] [LLVM][Verifier] Remove constant-only matrix stride check (PR #207665)   via llvm-commits
• [llvm] [SPIRV] Fix crash when lowering functions with aggregate return types (PR #209027)   Sparsh via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] [AMDGPU][True16] Select _t16 D16 loads/stores for FLAT/GLOBAL/SCRATCH (PR #210191)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] [AMDGPU][True16] Select _t16 D16 loads/stores for FLAT/GLOBAL/SCRATCH (PR #210191)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Narrowing Zip (PR #210040)   via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   Mitch Briles via llvm-commits
• [llvm] [SLP][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   Madhur Amilkanthwar via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [lld] [LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (PR #210080)   Jacek Caban via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat to SALU instructions (PR #210156)   Jay Foad via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Sander de Smalen via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Matt Arsenault via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Jay Foad via llvm-commits
• [llvm] [CycleInfo] Reference cycles by preorder index, not pointer. NFC (PR #210271)   Alexis Engelke via llvm-commits
• [llvm] [CycleInfo] Reference cycles by preorder index, not pointer. NFC (PR #210271)   Alexis Engelke via llvm-commits
• [llvm] [KnownBits] Use X < Y identity and umin(MaxX, MaxY - 1) bound in urem (PR #210262)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Victor Campos via llvm-commits
• [llvm] [AArch64][GlobalISel] BF16 sitofp. (PR #210282)   David Green via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Jay Foad via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Jay Foad via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (PR #209966)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [lld] a3bcc01 - [LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)   via llvm-commits
• [lld] [LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (PR #210080)   Jacek Caban via llvm-commits
• [llvm] f520e70 - [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (#209966)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (PR #209966)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (PR #209965)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Preserve signed i1 semantics in sitofp (PR #209232)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] 0e1b093 - [SPIR-V] Preserve signed i1 semantics in sitofp (#209232)   via llvm-commits
• [llvm] [SPIR-V] Preserve signed i1 semantics in sitofp (PR #209232)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LLVM][Verifier] Remove constant-only matrix stride check (PR #207665)   Florian Hahn via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [CycleInfo] Represent cycles by an opaque handle. NFC (PR #210117)   Alexis Engelke via llvm-commits
• [flang] [llvm] [flang][MIF] Adding lowering for EVENT POST/WAIT statements (PR #210283)   Jean-Didier PAILLEUX via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   David Spickett via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [compiler-rt] [lldb] Replace Python's deprecated tempfile.mktemp() with secure temp APIs (PR #210123)   David Spickett via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] 5fcab35 - [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)   via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (PR #209517)   Jay Foad via llvm-commits
• [llvm] [WIP][X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][CodeGen] Don't always create `S_SET_VGPR_MSB` after `S_SETREG_B32` (PR #210042)   Lucas Ramirez via llvm-commits
• [llvm] [WIP][X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   via llvm-commits
• [llvm] Arm ropi rwpi dynreloc consts (PR #207931)   Peter Smith via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for XiangShan-KunMingHu (PR #148581)   Lin Wang via llvm-commits
• [llvm] [ConstraintElimination] Handle equality predicates with signed system (PR #205331)   Florian Hahn via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Ian Anderson via llvm-commits
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• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
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• [llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)   Florian Hahn via llvm-commits
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• [llvm] [AMDGPU] Tweak sched model latencies for VALU fast-forward cases (PR #198475)   Matt Arsenault via llvm-commits
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• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Weibo He via llvm-commits
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• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [AMDGPU][X86][DAG] Avoid duplicate BinOp result from narrowing insert-extract sub-vector (PR #201056)   Matt Arsenault via llvm-commits
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• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [llvm] [AMDGPU][X86][DAG] Avoid duplicate BinOp result from narrowing insert-extract sub-vector (PR #201056)   via llvm-commits
• [llvm] [SimplifyCFG] Don't hoist instructions with mismatched !nontemporal (PR #206648)   via llvm-commits
• [llvm] [SimplifyCFG] Don't hoist instructions with mismatched !nontemporal (PR #206648)   via llvm-commits
• [llvm] [GitHub] Collect statistics in test-suite workflow (PR #210316)   Luke Lau via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Joseph Huber via llvm-commits
• [llvm] [IR] Preserve TBAA metadata when merging equivalent memory accesses (PR #208499)   via llvm-commits
• [llvm] [Offload][OpenMP] Fix RPC callback registration when RPC server is not initialized (PR #210215)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Matt Arsenault via llvm-commits
• [llvm] 23b0281 - [X86] Fix assertion failure for tail call on i686+pic (#210302)   via llvm-commits
• [llvm] [X86] Fix assertion failure for tail call on i686+pic (PR #210302)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (PR #208805)   LLVM Continuous Integration via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Jay Foad via llvm-commits
• [llvm] [dyndbg][LLVM] Implement dynamic debugging support (PR #194854)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   via llvm-commits
• [llvm] [SCEV] Infer no-wrap flags for shl by a constant. (PR #208434)   Florian Hahn via llvm-commits
• [llvm] [AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (PR #169699)   Anatoly Trosinenko via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   via llvm-commits
• [llvm] [MemorySSA] Make getPreviousDef iterative to avoid stack overflow (PR #205159)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from x86-64-v4 (PR #210312)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Znver5 Scheduler Description (PR #172370)   Youngmin Choi via llvm-commits
• [llvm] [CodeGen] Fix stale LiveIntervals regmask tables after MachineBasicBl… (PR #209610)   Matt Arsenault via llvm-commits
• [llvm] [AVR] Support stack realignment (PR #187129)   Ben Shi via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Sander de Smalen via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Timm Baeder via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Timm Baeder via llvm-commits
• [llvm] Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (PR #210322)   Matt Arsenault via llvm-commits
• [llvm] Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (PR #210322)   Matt Arsenault via llvm-commits
• [llvm] Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (PR #210322)   Matt Arsenault via llvm-commits
• [llvm] Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (PR #210322)   via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] 38104cf - [LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (#204820)   via llvm-commits
• [llvm] [LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (PR #204820)   Paul Walker via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [PowerPC]optimize the epilogue for restore non volatile cr fields (PR #202339)   zhijian lin via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Michael Kruse via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Sebastian Neubauer via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   Momchil Velikov via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210324)   Momchil Velikov via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] 75ec1a4 - [SPIRV] Emit NonSemantic DebugGlobalVariable (#207230)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210326)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210324)   via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210327)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210326)   via llvm-commits
• [llvm] [GVN] Assign unique VNs to calls with operand bundles (PR #210328)   Momchil Velikov via llvm-commits
• [llvm] [NFC][NVPTX] Introduce AS aware address matching in TableGen (PR #210309)   Kirill Vedernikov via llvm-commits
• [llvm] [GVN] Simple GVN-based hoisting of scalars: precommit tests (PR #210329)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210327)   via llvm-commits
• [clang] [llvm] [GVN] Simple GVN-based hoisting of scalars (PR #210330)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Assign unique VNs to calls with operand bundles (PR #210328)   via llvm-commits
• [llvm] [GVN] Simple GVN-based hoisting of scalars: precommit tests (PR #210329)   via llvm-commits
• [clang] [llvm] [GVN] Simple GVN-based hoisting of scalars (PR #210330)   via llvm-commits
• [clang] [llvm] [GVN] Simple GVN-based hoisting of scalars (PR #210330)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [GVN] Simple GVN-based hoisting of scalars (PR #210330)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugGlobalVariable (PR #207230)   Manuel Carrasco via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][NFC] Port raw syscall users to existing syscall_wrappers (PR #208039)   Mikhail R. Gadelha via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   LLVM Continuous Integration via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] Add missing BigArchive container plugin to lldb's bazel build (PR #210304)   David Young via llvm-commits
• [llvm] Add missing BigArchive container plugin to lldb's bazel build (PR #210304)   David Young via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (PR #210322)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fold constant min/max vector reductions (PR #209190)   via llvm-commits
• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)   via llvm-commits
• [llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)   Jay Foad via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210324)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210326)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210327)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Assign unique VNs to calls with operand bundles (PR #210328)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Simple GVN-based hoisting of scalars: precommit tests (PR #210329)   Momchil Velikov via llvm-commits
• [clang] [llvm] [GVN] Simple GVN-based hoisting of scalars (PR #210330)   Momchil Velikov via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64]Fix specification of NEON FP16 scalar CVT to/from fixed point (PR #201425)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   Abhina Sree via llvm-commits
• [llvm] [DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (PR #201435)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [X86][Codegen] - Introduce a new tuning for X86 backend to control FMA generation (PR #210343)   Rohit Aggarwal via llvm-commits
• [llvm] [LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (PR #204820)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][Codegen] - Introduce a new tuning for X86 backend to control FMA generation (PR #210343)   via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Matt Arsenault via llvm-commits
• [llvm] [AArch64]Fix specification of NEON FP16 scalar CVT to/from fixed point (PR #201425)   via llvm-commits
• [llvm] [X86][Codegen] - Introduce a new tuning for X86 backend to control FMA generation (PR #210343)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [AMDGPU][TTI] Refine gfx9 packed FP32 SLP costs for pair formation and shuffles (PR #208572)   Matt Arsenault via llvm-commits
• [llvm] [libc][bazel] Add missing arpa/inet functions and tests (PR #210310)   via llvm-commits
• [llvm] [AMDGPU][TTI] Refine gfx9 packed FP32 SLP costs for pair formation and shuffles (PR #208572)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (PR #199688)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Matt Arsenault via llvm-commits
• [llvm] 7c1b00b - [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (#210340)   via llvm-commits
• [llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [CodeGen] Add EmitCodeGenCallSiteInfo flag (PR #206668)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Fix zos_translation_time module flag (PR #210058)   Sean Perry via llvm-commits
• [llvm] X86: Add pattern for optimized BLSIC IR form (PR #209814)   via llvm-commits
• [llvm] [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #208392)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Tony Varghese via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (PR #210348)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (PR #210348)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] 499b69c - [DWARFLinker] Fix data race on the per-unit file-name cache (#208967)   via llvm-commits
• [llvm] [DWARFLinker] Fix data race on the per-unit file-name cache (PR #208967)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Fix computeKnownBitsForTargetNode for AMDGPUISD::LDS (PR #210350)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix computeKnownBitsForTargetNode for AMDGPUISD::LDS (PR #210350)   via llvm-commits
• [llvm] [AMDGPU] Fix computeKnownBitsForTargetNode for AMDGPUISD::LDS (PR #210350)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Implement double-precision acosh (PR #199953)   via llvm-commits
• [llvm] Add macOS premerge check workflow (PR #207435)   Louis Dionne via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [llvm] [CodeView] Encode signed enumerators as signed integers (PR #210352)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Matt Arsenault via llvm-commits
• [llvm] [CodeView] Encode signed enumerators as signed integers (PR #210352)   via llvm-commits
• [llvm] [AMDGPU] Fix computeKnownBitsForTargetNode for AMDGPUISD::LDS (PR #210350)   Jay Foad via llvm-commits
• [libc] [llvm] [libc] Port process utilities to hermetic mode and enable some tests (PR #209999)   via llvm-commits
• [compiler-rt] [flang] [libunwind] [lldb] [llvm] [docs] Rename misc rst docs to md (PR #210208)   David Spickett via llvm-commits
• [llvm] [DWARFLinker] Make synthetic type names deterministic under threading (PR #209553)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Fix computeKnownBitsForTargetNode for AMDGPUISD::LDS (PR #210350)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize sub(C, or(X, C)) --> and(X, ~C) fold (PR #202274)   via llvm-commits
• [llvm] [X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (PR #210354)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (PR #210348)   Matt Arsenault via llvm-commits
• [llvm] [X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (PR #210354)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (PR #210348)   Matt Arsenault via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Gang Chen via llvm-commits
• [llvm] [X86][Codegen] - Introduce a new tuning for X86 backend to control FMA generation (PR #210343)   via llvm-commits
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• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Matt Arsenault via llvm-commits
• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Matt Arsenault via llvm-commits
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• [llvm] [SCEV][NFC] Refactor LoopGuards range check matching (PR #210362)   Aleksandr Popov via llvm-commits
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• [llvm] [llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (PR #209226)   Gang Chen via llvm-commits
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• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow cleanup of dead ExpandSCEVs (PR #208952)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Anshil Gandhi via llvm-commits
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• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Anshil Gandhi via llvm-commits
• [llvm] [RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics (PR #209575)   Hongyu Chen via llvm-commits
• [llvm] [VPlan] Introduce VPGEPInstruction (PR #193510)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
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• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Shikhar Jain via llvm-commits
• [llvm] [NFC] Cleanup in SOPInstructions.td (PR #210367)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Remove SVEIntrinsicOpts pass. (PR #210368)   Paul Walker via llvm-commits
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• [llvm] [SCEV][NFC] Refactor LoopGuards range check matching (PR #210362)   via llvm-commits
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• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [WIP][AMDGPU] Support the RF inline asm constraint (PR #195123)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU] Support the RF inline asm constraint (PR #195123)   Jun Wang via llvm-commits
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• [llvm] Tighten loop guards range check idiom (PR #210387)   Ramkumar Ramachandra via llvm-commits
• [llvm] Tighten loop guards range check idiom (PR #210387)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [docs] Update the commit review admin task with process details (PR #210420)   Reid Kleckner via llvm-commits
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• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Vitaly Buka via llvm-commits
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• [llvm] IPRA: Fixes an IPRA compilation failure. (PR #196928)   Quentin Colombet via llvm-commits
• [llvm] IPRA: Fixes an IPRA compilation failure. (PR #196928)   Quentin Colombet via llvm-commits
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• [llvm] IPRA:Fix crash and verification failures for PLT calls (PR #196917)   Quentin Colombet via llvm-commits
• [llvm] IPRA:Fix crash and verification failures for PLT calls (PR #196917)   Quentin Colombet via llvm-commits
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• [llvm] [docs] Rewrite 19 LLVM docs from reST to markdown (PR #208798)   Reid Kleckner via llvm-commits
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• [llvm] [docs] Rewrite 19 LLVM docs from reST to markdown (PR #208798)   Reid Kleckner via llvm-commits
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• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Kelvin Li via llvm-commits
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• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [llvm] [VPlan] Infer SrcTy in createScalarExtOrTrunc (NFC) (PR #210423)   Luke Lau via llvm-commits
• [llvm] Fix macOS casing in premerge workflow (PR #210477)   Mishal Shah via llvm-commits
• [llvm] Fix macOS casing in premerge workflow (PR #210477)   Mishal Shah via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Luke Lau via llvm-commits
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• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
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• [llvm] [Support] Improve the logic for re-raising signals (PR #177864)   Alex Rønne Petersen via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   Oliver Stöneberg via llvm-commits
• [llvm] [TableGen] Diagnose sub-register indices that overflow their register (PR #206346)   Rahul Joshi via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   Balázs Benics via llvm-commits
• [flang] [llvm] [OpenMP] Add constexpr enum ranges for all clauses and all directives (PR #210406)   Sairudra More via llvm-commits
• [llvm] [GlobalISel] Compact large match tables (PR #202642)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Use dominating conditions in computeConstantRange (PR #210412)   Nikita Popov via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Phoebe Wang via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Phoebe Wang via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [clang] [llvm] [RISCV] Add packed narrowing convert intrinsics (PR #210389)   via llvm-commits
• [clang] [llvm] [DirectX] Add `--dx-embed-debug` and `--dx-pdb-path` flags (PR #204166)   Jessica Clarke via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Nikita Popov via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Nikita Popov via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Nikita Popov via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Nikita Popov via llvm-commits
• [clang] [llvm] [DirectX] Add `--dx-embed-debug` and `--dx-pdb-path` flags (PR #204166)   Jessica Clarke via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [clang] [llvm] [AMDGPU] Match bitsin(typeof(x)) - ctpop(x) to s_bcnt0_i32 (PR #164847)   Jay Foad via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [Support] Improve the logic for re-raising signals (PR #177864)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [DirectX] Add `--dx-embed-debug` and `--dx-pdb-path` flags (PR #204166)   Ilia Kuklin via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [clang] [llvm] [DirectX] Add `--dx-embed-debug` and `--dx-pdb-path` flags (PR #204166)   Jessica Clarke via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   via llvm-commits
• [llvm] [X86][APX] Optimize usub.sat(X, 1) to cmp+adc with NDD (PR #208475)   via llvm-commits
• [llvm] [CodeGen] Add EmitCodeGenCallSiteInfo flag (PR #206668)   Nikita Popov via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [DirectX] Fix `--dx-embed-debug` flag dependency (PR #210513)   Ilia Kuklin via llvm-commits
• [llvm] [DirectX] Fix `--dx-embed-debug` flag dependency (PR #210513)   via llvm-commits
• [llvm] be68a88 - [ADT] Fix non-assertion build after 36c812f771 (#210511)   via llvm-commits
• [llvm] [ADT] Fix non-assertion build after 36c812f771 (PR #210511)   Krzysztof Parzyszek via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize <8 x i1> and <16 x i1> loads and stores (PR #210514)   Joel Walker via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize <8 x i1> and <16 x i1> loads and stores (PR #210514)   via llvm-commits
• [llvm] [DirectX] Fix `--dx-embed-debug` flag dependency (PR #210513)   Jessica Clarke via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [llvm] 53096b7 - [X86][APX] Optimize usub.sat(X,1) to cmp+adc with NDD (#208475)   via llvm-commits
• [llvm] [X86][APX] Optimize usub.sat(X, 1) to cmp+adc with NDD (PR #208475)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Optimize usub.sat(X, 1) to cmp+adc with NDD (PR #208475)   via llvm-commits
• [llvm] c739ce6 - [TableGen] Diagnose sub-register indices that overflow their register (#206346)   via llvm-commits
• [llvm] [TableGen] Diagnose sub-register indices that overflow their register (PR #206346)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Diagnose sub-register indices that overflow their register (PR #206346)   via llvm-commits
• [flang] [llvm] [OpenMP] Add constexpr enum ranges for all clauses and all directives (PR #210406)   Krzysztof Parzyszek via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (PR #210517)   Jessica Clarke via llvm-commits
• [lld] 0b5073a - [NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (#210517)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (PR #210517)   Jessica Clarke via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (PR #210518)   Jessica Clarke via llvm-commits
• [clang] [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #207568)   via llvm-commits
• [lld] 2144ee4 - [NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (#210518)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (PR #210518)   Jessica Clarke via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_TLS*_HINT RelExprs (PR #210519)   Jessica Clarke via llvm-commits
• [lld] f9b7acb - [NFC][ELF] Remove unused R_TLS*_HINT RelExprs (#210519)   via llvm-commits
• [lld] [NFC][ELF] Remove unused R_TLS*_HINT RelExprs (PR #210519)   Jessica Clarke via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [InstCombine] Fold lshr/ashr (mul X, 2^N + 2^M) -> add (X, lshr/ashr X, N - M) (PR #210140)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] acd3fcf - [clang] Emit call graph type metadata for internal linkage symbols (#210194)   via llvm-commits
• [clang] [llvm] [clang] Emit call graph type metadata for internal linkage symbols (PR #210194)   Prabhu Rajasekaran via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   Lucas Ly Ba via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   Hongyu Chen via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   Hongyu Chen via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [clang] [llvm] [RISCV] Add packed narrowing convert intrinsics (PR #210389)   Hongyu Chen via llvm-commits
• [llvm] [VPlan] Peek through nested phi incoming values in computeBlendMasks (PR #203164)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use control flow to implement MaskedCond and preserve SSA (PR #201784)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use CFG to mask early exit loops with side-effects. NFC (PR #203263)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [SelectOptimize] Add no-PGO select-density heuristic and related X86 … (PR #200991)   Eitan Frachtenberg via llvm-commits
• [llvm] [SelectOptimize] Enable in default pipeline for X86 only (PR #200990)   Eitan Frachtenberg via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] mailmap: Add entries for Peter Collingbourne. (PR #210526)   Peter Collingbourne via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   Matt Arsenault via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] mailmap: Add entries for Peter Collingbourne. (PR #210526)   Peter Collingbourne via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Add EmitCodeGenCallSiteInfo flag (PR #206668)   Matt Arsenault via llvm-commits
• [llvm] [NFC][NVPTX] Introduce AS aware address matching in TableGen (PR #210309)   Rajat Bajpai via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [clang] [llvm] [clang] Emit call graph type metadata for internal linkage symbols (PR #210194)   via llvm-commits
• [llvm] [ExpandReductions] Add support for non-pow2 vector counts (PR #208738)   Prajwal KP via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #210516)   via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize <8 x i1> and <16 x i1> loads and stores (PR #210514)   Joel Walker via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Alexis Engelke via llvm-commits
• [llvm] d89537d - [DirectX] Fix `--dx-embed-debug` flag dependency (#210513)   via llvm-commits
• [llvm] [DirectX] Fix `--dx-embed-debug` flag dependency (PR #210513)   Ilia Kuklin via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [llvm] [TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (PR #210529)   Taimuraz Kaitmazov via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   Lucas Ly Ba via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Sabona Abdi via llvm-commits
• [llvm] [InstCombine] Fold fcmp of two int-to-fp conversions to an integer compare (PR #210521)   Lucas Ly Ba via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Sabona Abdi via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [ADT] Add `[[clang::lifetimebound]]` annotations to Twine.h (PR #210474)   via llvm-commits
• [llvm] [AArch64] Forward stores of loaded i1 vectors as integer load/store pairs (PR #210535)   Joel Walker via llvm-commits
• [llvm] [Github] Install `llvm-tools` in libc container (PR #210414)   via llvm-commits
• [llvm] [AArch64] Forward stores of loaded i1 vectors as integer load/store pairs (PR #210535)   via llvm-commits
• [llvm] [mlir] [mlir][IR] Add SymbolUserTypeInterface (PR #198435)   Jared Hoberock via llvm-commits
• [llvm] [Github] Install `llvm-tools` in libc container (PR #210414)   via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize <8 x i1> and <16 x i1> loads and stores (PR #210514)   Joel Walker via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   Eli Friedman via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Guo Chen via llvm-commits
• [llvm] [IR][NFC] Avoid unneccessary move of analysis results (PR #210540)   Alexis Engelke via llvm-commits
• [llvm] [IR][NFC] Avoid unneccessary move of analysis results (PR #210540)   via llvm-commits
• [llvm] [Support] Add constexpr versions of Add/Sub/MulOverflow (PR #210404)   Eli Friedman via llvm-commits
• [llvm] [IR][NFC] Avoid unneccessary move of analysis results (PR #210540)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [llvm] Reapply "Skipping host target exports during cross-compilation" (#210… (PR #210496)   via llvm-commits
• [clang] [compiler-rt] [llvm] Reapply "Skipping host target exports during cross-compilation" (#210… (PR #210496)   via llvm-commits
• [clang] [compiler-rt] [llvm] Reapply "Skipping host target exports during cross-compilation" (#210… (PR #210496)   via llvm-commits
• [clang] [compiler-rt] [llvm] Reapply "Skipping host target exports during cross-compilation" (#210… (PR #210496)   via llvm-commits
• [llvm] [IR][NFC] Avoid unneccessary move of analysis results (PR #210540)   Aiden Grossman via llvm-commits
• [llvm] /home/macaronjaune/afs/gsoc2026/debian-lsp (PR #210541)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Lucas Ly Ba via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
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• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Justin Lebar via llvm-commits
• [llvm] [LAA] Add tests for non-affine monotonic pointer bounds (NFC). (PR #210544)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Justin Lebar via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Justin Lebar via llvm-commits
• [llvm] [LSV] Respect atomic ordering in isSafeToMove (PR #208631)   Justin Lebar via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Justin Lebar via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Nikita Popov via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] 220e827 - [IR][NFC] Avoid unneccessary move of analysis results (#210540)   via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR][NFC] Avoid unneccessary move of analysis results (PR #210540)   Alexis Engelke via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (PR #210544)   Florian Hahn via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Justin Lebar via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Justin Lebar via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] [LSV] Respect atomic ordering in isSafeToMove (PR #208631)   Justin Lebar via llvm-commits
• [llvm] [LSV] Respect atomic ordering in isSafeToMove (PR #208631)   Justin Lebar via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
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• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LSV] Respect atomic ordering in isSafeToMove (PR #208631)   Justin Lebar via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   via llvm-commits
• [llvm] bcb4e7d - [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (#202482)   via llvm-commits
• [llvm] [InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (PR #202482)   Justin Lebar via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold zero-guarded biased-shifted ctlz to drop the zero check (PR #210541)   Lucas Ly Ba via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Sergei Barannikov via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   via llvm-commits
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• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Fangrui Song via llvm-commits
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• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   via llvm-commits
• [llvm] [CycleInfo] Deduplicate getExitBlocks with a set. NFC (PR #210557)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Deduplicate getExitBlocks with a set. NFC (PR #210557)   Fangrui Song via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Sergei Barannikov via llvm-commits
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• [llvm] [Github] Install `llvm-tools` in libc container (PR #210414)   Aiden Grossman via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Sergei Barannikov via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLateEHPreparePass (PR #209956)   Aiden Grossman via llvm-commits
• [llvm] f5c4f39 - [WebAssembly] Port WebAssemblyLateEHPreparePass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLateEHPreparePass (PR #209956)   Aiden Grossman via llvm-commits
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• [llvm] [WebAssembly] Port WebAssemblyReplacePhysRegsPass (PR #209957)   Aiden Grossman via llvm-commits
• [llvm] 0e3d17a - [WebAssembly] Port WebAssemblyReplacePhysRegsPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyReplacePhysRegsPass (PR #209957)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Mend Renovate via llvm-commits
• [llvm] [Github] Install `llvm-tools` in libc container (PR #210414)   via llvm-commits
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• [llvm] [Github] Install `llvm-tools` in libc container (PR #210414)   via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
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• [llvm] 14bf60d - [CycleInfo] Deduplicate getExitBlocks with a set. NFC (#210557)   via llvm-commits
• [llvm] [CycleInfo] Deduplicate getExitBlocks with a set. NFC (PR #210557)   Fangrui Song via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Chinmay Deshpande via llvm-commits
• [llvm] [InstCombine] Set nnan on fcmp with known non-NaN operands (PR #210560)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Set nnan on fcmp with known non-NaN operands (PR #210560)   via llvm-commits
• [llvm] [InstCombine] Set nnan on fcmp with known non-NaN operands (PR #210560)   via llvm-commits
• [llvm] [GIthub] symlink `llvm-tools` in libc container (PR #210561)   via llvm-commits
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• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   via llvm-commits
• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Jakub Kuderski via llvm-commits
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• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Chinmay Deshpande via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   via llvm-commits
• [llvm] [GlobalISel] Compact large match tables (PR #202642)   David Zbarsky via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   David Zbarsky via llvm-commits
• [llvm] [GlobalISel] Encode root operand indices in match opcodes (PR #210562)   David Zbarsky via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   Fangrui Song via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   Fangrui Song via llvm-commits
• [llvm] [Github] symlink `llvm-tools` in libc container (PR #210561)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Mend Renovate via llvm-commits
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• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Alexander Coffin via llvm-commits
• [llvm] 81ed4d0 - [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (#210564)   via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   Fangrui Song via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
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• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
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• [clang] [compiler-rt] [llvm] Skipping host target exports during cross-compilation (PR #209922)   LLVM Continuous Integration via llvm-commits
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• [llvm] [AA/MSSA/LICM/Sink] Fix correctness and optimize better around atomics (PR #210568)   Keno Fischer via llvm-commits
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• [llvm] [AA/MSSA/LICM/Sink] Fix correctness and optimize better around atomics (PR #210568)   via llvm-commits
• [llvm] [AA/MSSA/LICM/Sink] Fix correctness and optimize better around atomics (PR #210568)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
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• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
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• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Luke Lau via llvm-commits
• [llvm] [LSV] Respect atomic ordering in isSafeToMove (PR #208631)   Justin Lebar via llvm-commits
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• [llvm] [AA/MSSA/LICM/Sink] Fix correctness and optimize better around atomics (PR #210568)   Keno Fischer via llvm-commits
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• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   via llvm-commits
• [llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)   via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   via llvm-commits
• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Kazu Hirata via llvm-commits
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• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Kazu Hirata via llvm-commits
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• [llvm] [IR][RFC] Add @llvm.mask.beforefirst intrinsic (PR #203874)   Luke Lau via llvm-commits
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• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Alexis Engelke via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   Andrew Boyarshin via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   LLVM Continuous Integration via llvm-commits
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• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Simon Pilgrim via llvm-commits
• [llvm] [CycleInfo] Identify cycles with a single-pass DFS algorithm (PR #210491)   Fangrui Song via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [IR][RFC] Add @llvm.mask.beforefirst intrinsic (PR #203874)   via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   Alexis Engelke via llvm-commits
• [llvm] [UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (PR #210564)   Alexis Engelke via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Kamlesh Kumar via llvm-commits
• [llvm] [IR][RFC] Add @llvm.mask.beforefirst intrinsic (PR #203874)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [ExpandReductions] Add support for non-pow2 vector counts (PR #208738)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] 8042e61 - [InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (#210499)   via llvm-commits
• [llvm] [InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (PR #210499)   Andreas Jonson via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [polly] [Polly][test] Add missing REQUIRES line (PR #210578)   Michael Kruse via llvm-commits
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• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [polly] 5cae63b - [Polly][test] Add missing REQUIRES line (#210578)   via llvm-commits
• [polly] [Polly][test] Add missing REQUIRES line (PR #210578)   Michael Kruse via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   Adam Scott via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [Coroutines] Use destroy slot for CoroElide resume fallthrough (PR #207799)   Stephan Dollberg via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   Alexis Engelke via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [llvm] Fix SCC enter block collection in BPI (PR #210580)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] [InstCombine] Optimize and of overflow checks (PR #141962)   Bobby SONG via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Phoebe Wang via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   David Chisnall via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [InstCombine] Set nnan on fcmp with known non-NaN operands (PR #210560)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold fptoui(fadd(uitofp(X), C)) to X (PR #210588)   Lucas Ly Ba via llvm-commits
• [llvm] [InstCombine] Fold fptoui(fadd(uitofp(X), C)) to X (PR #210588)   via llvm-commits
• [llvm] [InstCombine] Fold fptoui(fadd(uitofp(X), C)) to X (PR #210588)   via llvm-commits
• [llvm] [InstCombine] Fold fptoui(fadd(uitofp(X), C)) to X (PR #210588)   Lucas Ly Ba via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   David Zbarsky via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   David Zbarsky via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   via llvm-commits
• [llvm] [GlobalISel] Encode root operand indices in match opcodes (PR #210562)   David Zbarsky via llvm-commits
• [llvm] [GlobalISel] Encode root operand indices in match opcodes (PR #210562)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] fix cratch in tail call return type (PR #210579)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] 1d55a81 - [X86] Support apxf in attribute target (#184078)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [compiler-rt] [tsan][ppc64] Fix copy-paste bug in __sigsetjmp OPD TOC loading (PR #210589)   via llvm-commits
• [compiler-rt] [tsan][ppc64] Fix copy-paste bug in __sigsetjmp OPD TOC loading (PR #210589)   via llvm-commits
• [compiler-rt] [tsan][ppc64] Fix copy-paste bug in __sigsetjmp OPD TOC loading (PR #210589)   via llvm-commits
• [llvm] [InstCombine] Optimize and of overflow checks (PR #141962)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Optimize and of overflow checks (PR #141962)   Yingwei Zheng via llvm-commits
• [llvm] 5e1873a - [OpenMP] Add constexpr enum ranges for all clauses and all directives (#210406)   via llvm-commits
• [flang] [llvm] [OpenMP] Add constexpr enum ranges for all clauses and all directives (PR #210406)   Krzysztof Parzyszek via llvm-commits
• [compiler-rt] [tsan][ppc64] Fix copy-paste bug in __sigsetjmp OPD TOC loading (PR #210589)   via llvm-commits
• [llvm] f25b3f6 - [LAA, LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)   via llvm-commits
• [llvm] [LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (PR #210544)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [llvm-lsp] LSP server for LLVM IR (PR #161969)   via llvm-commits
• [llvm] [orc-rt] Replace RunWrapperCall with generalized Dispatch (PR #210591)   Lang Hames via llvm-commits
• [llvm] [SLP][NFC]Add a test for potential masked div/rem ops, NFC (PR #210593)   Alexey Bataev via llvm-commits
• [llvm] 4b4d4a6 - [SLP][NFC]Add a test for potential masked div/rem ops, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test for potential masked div/rem ops, NFC (PR #210593)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test for potential masked div/rem ops, NFC (PR #210593)   via llvm-commits
• [llvm] ab39c49 - [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (#208184)   via llvm-commits
• [llvm] [X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (PR #208184)   Feng Zou via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [AVR] Support stack realignment (PR #187129)   Ben Shi via llvm-commits
• [llvm] [AVR] Support stack realignment (PR #187129)   Ben Shi via llvm-commits
• [llvm] [SLP][NFC]Add a test with potential masked revec udiv, NFC (PR #210596)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test with potential masked revec udiv, NFC (PR #210596)   via llvm-commits
• [llvm] 6375064 - [SLP][NFC]Add a test with potential masked revec udiv, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with potential masked revec udiv, NFC (PR #210596)   Alexey Bataev via llvm-commits
• [llvm] [Github] symlink `llvm-tools` in libc container (PR #210561)   via llvm-commits
• [llvm] [RISCV][SMT] add x100 vector sched info (PR #210597)   via llvm-commits
• [llvm] [llubi] Add support for constant inttoptr/ptrtoint expressions (PR #207028)   Ralf Jung via llvm-commits
• [llvm] [RISCV][SMT] add x100 vector sched info (PR #210597)   via llvm-commits
• [llvm] [RISCV][SMT] add x100 vector sched info (PR #210597)   via llvm-commits
• [llvm] [Github] symlink `llvm-tools` in libc container (PR #210561)   via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] [VPlan] Retire LVP::hasTailFolded (NFC). (PR #210598)   Florian Hahn via llvm-commits
• [llvm] [llubi] Experimental support for noalias (PR #195808)   Ralf Jung via llvm-commits
• [llvm] [AVR] Support stack realignment (PR #187129)   Ben Shi via llvm-commits
• [llvm] [llubi] Add support for exposed provenance (PR #200596)   Ralf Jung via llvm-commits
• [llvm] [llubi] Add support for captures (PR #201170)   Ralf Jung via llvm-commits
• [llvm] [AVR] Support stack realignment (PR #187129)   Ben Shi via llvm-commits
• [llvm] dcf03fe - [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (#210478)   via llvm-commits
• [llvm] [ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (PR #210478)   Kazu Hirata via llvm-commits
• [llvm] [lit] Add --per-test-output-subdir to isolate test_exec_root across concurrent runs (PR #206826)   David Young via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [llvm-lsp] LSP server for LLVM IR (PR #161969)   via llvm-commits
• [llvm] [VPlan] Retire LVP::hasTailFolded (NFC). (PR #210598)   via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [SPARC] Emit a TRUNCATE when combining truncating BSWAP-STOREs (PR #210483)   Rainer Orth via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [Support] Register SIGPIPE handler when the one-shot is set late (PR #208887)   Alex Kuleshov via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [InstCombine] Fold fptoui(fadd(uitofp(X), C)) to X (PR #210588)   Arda Serdar Pektezol via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Christoph Cullmann via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (PR #210606)   Benji Smith via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   via llvm-commits
• [llvm] [InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (PR #210606)   via llvm-commits
• [llvm] [InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (PR #210606)   via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (PR #210606)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (PR #210606)   Benji Smith via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   Nikita Popov via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Christoph Cullmann via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable -Werror on Windows (PR #210607)   Aiden Grossman via llvm-commits
• [llvm] [GlobalISel] Encode root operand indices in match opcodes (PR #210562)   Nikita Popov via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Nikita Popov via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Nikita Popov via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Nikita Popov via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Nikita Popov via llvm-commits
• [llvm] [AA/MSSA/LICM/Sink] Fix correctness and optimize better around atomics (PR #210568)   Nikita Popov via llvm-commits
• [llvm] InstCombine: fold select(X+umax(X,A)<X, C, umin(X+umax(X,A),C)) -> umin(X+umax(X,A),C) (PR #210609)   via llvm-commits
• [llvm] InstCombine: fold select(X+umax(X,A)<X, C, umin(X+umax(X,A),C)) -> umin(X+umax(X,A),C) (PR #210609)   via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nikita Popov via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Fangrui Song via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Fangrui Song via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Christoph Cullmann via llvm-commits
• [llvm] [InstCombine] Fold zext or trunc with rotations (PR #200598)   via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Eli Friedman via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Eli Friedman via llvm-commits
• [lld] users/jrtc27/lld test aarch64 ifunc bti (PR #210618)   Jessica Clarke via llvm-commits
• [lld] users/jrtc27/lld test aarch64 ifunc bti (PR #210618)   via llvm-commits
• [lld] users/jrtc27/lld test aarch64 ifunc bti (PR #210618)   via llvm-commits
• [lld] [NFC][test][ELF] Check DSO's ifunc2 is in .iplt in aarch64-ifunc-bti.s (PR #210618)   Jessica Clarke via llvm-commits
• [lld] [NFC][test][ELF] Check DSO's ifunc2 is in .iplt in aarch64-ifunc-bti.s (PR #210618)   Jessica Clarke via llvm-commits
• [lld] [NFC][test][ELF] Check DSO's ifunc2 is in .iplt in aarch64-ifunc-bti.s (PR #210618)   Jessica Clarke via llvm-commits
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• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   via llvm-commits
• [llvm] [AA] Use the cmpxchg merged ordering in getModRefInfo (PR #210545)   Justin Lebar via llvm-commits
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• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
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• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   via llvm-commits
• [polly] [Polly][test] Add missing REQUIRES line (PR #210578)   Karthika Devi C via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [IR][RFC] Add @llvm.mask.beforefirst intrinsic (PR #203874)   Luke Lau via llvm-commits
• [clang] [llvm] [ObjC][LTO] Propagate constant ivar offsets across ThinLTO and FullLTO (PR #205970)   Xiaoyang Gong via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to 0.2 spec (PR #207971)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to 0.2 spec (PR #207971)   Pengcheng Wang via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] fix crash in tail call return type (PR #210579)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [LoopInterchange] Supported partially-perfect Loop Nests (PR #199511)   Rohit Garg via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [llubi] Experimental support for noalias (PR #195808)   Zhige Chen via llvm-commits
• [llvm] [IndVarSimplify] Widen select-controlled recurrences (PR #209825)   Madhur Amilkanthwar via llvm-commits
• [llvm] [IndVarSimplify] Widen select-controlled recurrences (PR #209825)   via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Brandon Wu via llvm-commits
• [llvm] 9d2e7e6 - [FixIrreducible][UnifyLoopExits] Support switch statements (#206567)   via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   Robert Imschweiler via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [FixIrreducible][UnifyLoopExits] Support switch statements (PR #206567)   Robert Imschweiler via llvm-commits
• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   via llvm-commits
• [lld] [LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (PR #145461)   Kito Cheng via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Christian Ulmann via llvm-commits
• [llvm] [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (PR #210293)   Mel Chen via llvm-commits
• [llvm] [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (PR #210293)   Mel Chen via llvm-commits
• [llvm] [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (PR #210293)   Mel Chen via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [GlobalISel] emit G_BITCAST in widenScalarMergeValues when DstTy does not match WideTy (PR #203014)   Kacper Doga via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (PR #210293)   Mel Chen via llvm-commits
• [llvm] [DA] Rewrite BanerjeeMIV test with safe APInt interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   Alexis Engelke via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Zachary Yedidia via llvm-commits
• [llvm] [GlobalISel] emit G_BITCAST in widenScalarMergeValues when DstTy does not match WideTy (PR #203014)   Kacper Doga via llvm-commits