[llvm] [AArch64] Add combine for interleave deinterleave (3/n) (PR #208414)

[David Green via llvm-commits]

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@@ -27492,30 +27516,59 @@ static SDValue performInterleavedMaskedStoreCombine(
     return SDValue();
 
   unsigned NumParts = ValueInterleaveOps.size();
-  if (NumParts != 2 && NumParts != 4)
+  if (NumParts != 2 && NumParts != 3 && NumParts != 4)
     return SDValue();
 
-  // At the moment we're unlikely to see a fixed-width vector interleave as
-  // we usually generate shuffles instead.
   EVT SubVecTy = ValueInterleaveOps[0].getValueType();
-  if (!SubVecTy.isScalableVT() ||
-      SubVecTy.getSizeInBits().getKnownMinValue() != 128 ||
-      !DAG.getTargetLoweringInfo().isTypeLegal(SubVecTy))
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  if (!TLI.isTypeLegal(SubVecTy))
     return SDValue();
+  bool IsScalable = SubVecTy.isScalableVector();
+  unsigned SubBits = SubVecTy.getSizeInBits().getKnownMinValue();
+  if (IsScalable) {
+    if (SubBits != 128)
+      return SDValue();
+  } else if (SubBits != 64 && SubBits != 128) {
+    return SDValue();
+  }
 
   SDLoc DL(N);
-  SDValue NarrowMask =
-      getNarrowMaskForInterleavedOps(DAG, DL, MST->getMask(), NumParts);
-  if (!NarrowMask)
-    return SDValue();
+  if (IsScalable) {
+    if (NumParts == 3)
+      return SDValue();
+    SDValue Pred;
+    if (IsMasked) {
+      Pred = getNarrowMaskForInterleavedOps(DAG, DL, Mask, NumParts);
+      if (!Pred)
+        return SDValue();
+    } else {
+      EVT PredVT = SubVecTy.changeVectorElementType(*DAG.getContext(), MVT::i1);
+      Pred = DAG.getConstant(1, DL, PredVT);
+    }
+
+    const Intrinsic::ID IID =
+        NumParts == 2 ? Intrinsic::aarch64_sve_st2 : Intrinsic::aarch64_sve_st4;
+    SmallVector<SDValue, 8> Ops;
+    Ops.append({Chain, DAG.getConstant(IID, DL, MVT::i32)});
+    Ops.append(ValueInterleaveOps);
+    Ops.append({Pred, BasePtr});
+    return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops);
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davemgreen wrote:

Should this have a memory operand? And use getMemIntrinsicNode?

https://github.com/llvm/llvm-project/pull/208414