[llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)

[Paul Walker via llvm-commits]

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@@ -34374,15 +34375,23 @@ SDValue
 AArch64TargetLowering::LowerGET_ACTIVE_LANE_MASK(SDValue Op,
                                                  SelectionDAG &DAG) const {
   EVT VT = Op.getValueType();
-  assert(VT.isFixedLengthVector() && "Expected fixed length vector type!");
+  assert((VT.isFixedLengthVector() || VT == MVT::nxv1i1) &&
+         "Expected fixed length vector type or nxv1i1!");
 
   assert(Subtarget->isSVEorStreamingSVEAvailable() &&
          "Lowering fixed length get_active_lane_mask requires SVE!");
 
+  SDLoc DL(Op);
+  if (VT == MVT::nxv1i1) {
+    EVT NewMaskTy = MVT::nxv2i1;
+    SDValue Mask = DAG.getNode(ISD::GET_ACTIVE_LANE_MASK, DL, NewMaskTy,
+                               Op.getOperand(0), Op.getOperand(1));
+    return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Mask,
+                       DAG.getVectorIdxConstant(0, DL));
----------------
paulwalker-arm wrote:

```suggestion
    return DAG.getExtractSubvector(DL, VT, Mask, 0);
```

https://github.com/llvm/llvm-project/pull/208962