[llvm] [InstCombine] Set nnan on fcmp with known non-NaN operands (PR #210560)
Lucas Ly Ba via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 18 17:25:31 PDT 2026
https://github.com/lucasly-ba created https://github.com/llvm/llvm-project/pull/210560
When both operands of an fcmp are known to never be NaN, the comparison cannot involve a NaN, so nnan can be set. This exposes the fact to min/max recognition and lets codegen use the cheaper ordered comparison.
Fixes #199893
>From d784a70bc1850abf78a6758dddcfdfcc1e72a12b Mon Sep 17 00:00:00 2001
From: Lucas Ly Ba <hi at lucaslyba.com>
Date: Sun, 19 Jul 2026 00:40:16 +0200
Subject: [PATCH] [InstCombine] Set nnan on fcmp with known non-NaN operands
When both operands of an fcmp are known to never be NaN, the comparison cannot
involve a NaN, so nnan can be set. This exposes the fact to min/max recognition
and lets codegen use the cheaper ordered comparison.
Fixes #199893
---
.../InstCombine/InstCombineCompares.cpp | 10 ++
.../InstCombine/cast-int-fcmp-eq-0.ll | 18 +--
.../InstCombine/fcmp-denormals-are-zero.ll | 2 +-
.../InstCombine/fcmp-nnan-known-operands.ll | 48 ++++++
.../InstCombine/fcmp-select-sign.ll | 29 ++--
llvm/test/Transforms/InstCombine/fcmp.ll | 42 ++---
.../InstCombine/fpclass-from-dom-cond.ll | 4 +-
...ed-exponent-range-dominating-conditions.ll | 152 +++++++++---------
.../test/Transforms/InstCombine/is_fpclass.ll | 2 +-
.../simplify-demanded-fpclass-exp.ll | 8 +-
.../simplify-demanded-fpclass-fdiv.ll | 2 +-
.../InstCombine/simplify-demanded-fpclass.ll | 20 +--
12 files changed, 198 insertions(+), 139 deletions(-)
create mode 100644 llvm/test/Transforms/InstCombine/fcmp-nnan-known-operands.ll
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 42c2983034e22..0436c5e5b9460 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -9111,6 +9111,16 @@ Instruction *InstCombinerImpl::visitFCmpInst(FCmpInst &I) {
return replaceOperand(I, 1, ConstantFP::getZero(OpType));
}
+ // If neither operand can be a NaN, the comparison cannot see a NaN, so it is
+ // safe to set 'nnan'. This exposes the fact to min/max recognition and lets
+ // codegen use the cheaper ordered form.
+ if (!I.hasNoNaNs() &&
+ isKnownNeverNaN(Op0, getSimplifyQuery().getWithInstruction(&I)) &&
+ isKnownNeverNaN(Op1, getSimplifyQuery().getWithInstruction(&I))) {
+ I.setHasNoNaNs(true);
+ return &I;
+ }
+
// fcmp pred (fneg X), (fneg Y) -> fcmp swap(pred) X, Y
Value *X, *Y;
if (match(Op0, m_FNeg(m_Value(X))) && match(Op1, m_FNeg(m_Value(Y))))
diff --git a/llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll b/llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll
index daf48a6949a42..b2fb8ac33b4b3 100644
--- a/llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll
+++ b/llvm/test/Transforms/InstCombine/cast-int-fcmp-eq-0.ll
@@ -274,7 +274,7 @@ define i1 @i64_cast_cmp_oeq_int_0_sitofp_half(i64 %i) {
define i1 @i32_cast_cmp_oeq_int_0_uitofp_ppcf128(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_0_uitofp_ppcf128(
; CHECK-NEXT: [[F:%.*]] = uitofp i32 [[I:%.*]] to ppc_fp128
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq ppc_fp128 [[F]], 0.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq ppc_fp128 [[F]], 0.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = uitofp i32 %i to ppc_fp128
@@ -314,7 +314,7 @@ define i1 @i32_cast_cmp_oeq_int_i24max_sitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i24maxp1_uitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i24maxp1_uitofp(
; CHECK-NEXT: [[F:%.*]] = uitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0x4B800000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0x4B800000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = uitofp i32 %i to float
@@ -326,7 +326,7 @@ define i1 @i32_cast_cmp_oeq_int_i24maxp1_uitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i24maxp1_sitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i24maxp1_sitofp(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0x4B800000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0x4B800000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
@@ -337,7 +337,7 @@ define i1 @i32_cast_cmp_oeq_int_i24maxp1_sitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i32umax_uitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i32umax_uitofp(
; CHECK-NEXT: [[F:%.*]] = uitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0x4F800000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0x4F800000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = uitofp i32 %i to float
@@ -368,7 +368,7 @@ define i1 @i32_cast_cmp_oeq_int_i32umax_sitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i32imin_sitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i32imin_sitofp(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0xCF000000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0xCF000000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
@@ -379,7 +379,7 @@ define i1 @i32_cast_cmp_oeq_int_i32imin_sitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i32imax_uitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i32imax_uitofp(
; CHECK-NEXT: [[F:%.*]] = uitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0x4F000000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0x4F000000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = uitofp i32 %i to float
@@ -390,7 +390,7 @@ define i1 @i32_cast_cmp_oeq_int_i32imax_uitofp(i32 %i) {
define i1 @i32_cast_cmp_oeq_int_i32imax_sitofp(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_oeq_int_i32imax_sitofp(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], f0x4F000000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], f0x4F000000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
@@ -502,7 +502,7 @@ define i1 @i32_cast_cmp_oeq_int_inf_sitofp(i32 %i) {
define i1 @i128_cast_cmp_oeq_int_inf_uitofp(i128 %i) {
; CHECK-LABEL: @i128_cast_cmp_oeq_int_inf_uitofp(
; CHECK-NEXT: [[F:%.*]] = uitofp i128 [[I:%.*]] to float
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[F]], +inf
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[F]], +inf
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = uitofp i128 %i to float
@@ -533,7 +533,7 @@ define <2 x i1> @i32_vec_cast_cmp_oeq_vec_int_n0_sitofp(<2 x i32> %i) {
define <2 x i1> @i32_vec_cast_cmp_oeq_vec_int_i32imax_sitofp(<2 x i32> %i) {
; CHECK-LABEL: @i32_vec_cast_cmp_oeq_vec_int_i32imax_sitofp(
; CHECK-NEXT: [[F:%.*]] = sitofp <2 x i32> [[I:%.*]] to <2 x float>
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x float> [[F]], splat (float f0x4F000000)
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq <2 x float> [[F]], splat (float f0x4F000000)
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%f = sitofp <2 x i32> %i to <2 x float>
diff --git a/llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll b/llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll
index 670ed619fe04c..46664ff41a94d 100644
--- a/llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll
+++ b/llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll
@@ -13,7 +13,7 @@ define void @denormal_input_preserve_sign_fcmp_olt_smallest_normalized(float %f3
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp oeq half [[F16:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
-; CHECK-NEXT: [[CMPF32_FLAGS:%.*]] = fcmp oeq float [[F32]], 0.000000e+00
+; CHECK-NEXT: [[CMPF32_FLAGS:%.*]] = fcmp nnan oeq float [[F32]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32_FLAGS]], ptr @var, align 1
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/InstCombine/fcmp-nnan-known-operands.ll b/llvm/test/Transforms/InstCombine/fcmp-nnan-known-operands.ll
new file mode 100644
index 0000000000000..53bc58ffaeafc
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/fcmp-nnan-known-operands.ll
@@ -0,0 +1,48 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+; Both operands come from uitofp, which is never NaN, so the compare gets nnan.
+define i1 @both_uitofp(i32 %x, i32 %y) {
+; CHECK-LABEL: @both_uitofp(
+; CHECK-NEXT: [[FX:%.*]] = uitofp i32 [[X:%.*]] to float
+; CHECK-NEXT: [[FY:%.*]] = uitofp i32 [[Y:%.*]] to float
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[FX]], [[FY]]
+; CHECK-NEXT: ret i1 [[C]]
+;
+ %fx = uitofp i32 %x to float
+ %fy = uitofp i32 %y to float
+ %c = fcmp olt float %fx, %fy
+ ret i1 %c
+}
+
+define i1 @sitofp_and_const(i32 %x) {
+; CHECK-LABEL: @sitofp_and_const(
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], 3
+; CHECK-NEXT: ret i1 [[C]]
+;
+ %fx = sitofp i32 %x to double
+ %c = fcmp oge double %fx, 4.000000e+00
+ ret i1 %c
+}
+
+; Negative: generic floating-point operands may be NaN.
+define i1 @generic(float %x, float %y) {
+; CHECK-LABEL: @generic(
+; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[C]]
+;
+ %c = fcmp olt float %x, %y
+ ret i1 %c
+}
+
+; Negative: only one operand is known to be non-NaN.
+define i1 @one_unknown(i32 %x, float %y) {
+; CHECK-LABEL: @one_unknown(
+; CHECK-NEXT: [[FX:%.*]] = uitofp i32 [[X:%.*]] to float
+; CHECK-NEXT: [[C:%.*]] = fcmp ogt float [[Y:%.*]], [[FX]]
+; CHECK-NEXT: ret i1 [[C]]
+;
+ %fx = uitofp i32 %x to float
+ %c = fcmp olt float %fx, %y
+ ret i1 %c
+}
diff --git a/llvm/test/Transforms/InstCombine/fcmp-select-sign.ll b/llvm/test/Transforms/InstCombine/fcmp-select-sign.ll
index ac286040aafa7..bbf6ed6daf804 100644
--- a/llvm/test/Transforms/InstCombine/fcmp-select-sign.ll
+++ b/llvm/test/Transforms/InstCombine/fcmp-select-sign.ll
@@ -207,14 +207,15 @@ define <2 x i1> @fcmp_une_select_vec_mixed_mask_no_fold(<2 x i1> %c0, <2 x i1> %
; CHECK-LABEL: @fcmp_une_select_vec_mixed_mask_no_fold(
; CHECK-NEXT: [[S0:%.*]] = select <2 x i1> [[C0:%.*]], <2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 3.000000e+00, double 4.000000e+00>
; CHECK-NEXT: [[S1:%.*]] = select <2 x i1> [[C1:%.*]], <2 x double> <double 1.000000e+00, double 9.000000e+00>, <2 x double> <double 8.000000e+00, double 4.000000e+00>
-; CHECK-NEXT: [[R:%.*]] = fcmp une <2 x double> [[S0]], [[S1]]
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan une <2 x double> [[S0]], [[S1]]
; CHECK-NEXT: ret <2 x i1> [[R]]
+;
%s0 = select <2 x i1> %c0,
- <2 x double> <double 1.0, double 2.0>,
- <2 x double> <double 3.0, double 4.0>
+ <2 x double> <double 1.0, double 2.0>,
+ <2 x double> <double 3.0, double 4.0>
%s1 = select <2 x i1> %c1,
- <2 x double> <double 1.0, double 9.0>,
- <2 x double> <double 8.0, double 4.0>
+ <2 x double> <double 1.0, double 9.0>,
+ <2 x double> <double 8.0, double 4.0>
%r = fcmp une <2 x double> %s0, %s1
ret <2 x i1> %r
}
@@ -257,7 +258,7 @@ define i1 @fcmp_olt_select_multi_use_no_fold(double %a, double %b) {
; CHECK-NEXT: [[V3:%.*]] = select i1 [[V2]], double -1.000000e+00, double 1.000000e+00
; CHECK-NEXT: call void @use_double(double [[V1]])
; CHECK-NEXT: call void @use_double(double [[V3]])
-; CHECK-NEXT: [[V4:%.*]] = fcmp olt double [[V1]], [[V3]]
+; CHECK-NEXT: [[V4:%.*]] = fcmp nnan olt double [[V1]], [[V3]]
; CHECK-NEXT: ret i1 [[V4]]
;
%v0 = fcmp ult double %b, 0.000000e+00
@@ -396,11 +397,11 @@ define <2 x i1> @icmp_eq_select_vec_cond_no_fold(<2 x i1> %c1, <2 x i1> %c2) {
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%s1 = select <2 x i1> %c1,
- <2 x i32> <i32 1, i32 2>,
- <2 x i32> <i32 3, i32 4>
+ <2 x i32> <i32 1, i32 2>,
+ <2 x i32> <i32 3, i32 4>
%s2 = select <2 x i1> %c2,
- <2 x i32> <i32 1, i32 9>,
- <2 x i32> <i32 8, i32 4>
+ <2 x i32> <i32 1, i32 9>,
+ <2 x i32> <i32 8, i32 4>
%r = icmp eq <2 x i32> %s1, %s2
ret <2 x i1> %r
}
@@ -418,11 +419,11 @@ define <2 x i1> @icmp_eq_mixed_cond_no_fold(<2 x i1> %c1, i1 %c2) {
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%s1 = select <2 x i1> %c1,
- <2 x i32> <i32 1, i32 2>,
- <2 x i32> <i32 3, i32 4>
+ <2 x i32> <i32 1, i32 2>,
+ <2 x i32> <i32 3, i32 4>
%s2 = select i1 %c2,
- <2 x i32> <i32 1, i32 9>,
- <2 x i32> <i32 8, i32 4>
+ <2 x i32> <i32 1, i32 9>,
+ <2 x i32> <i32 8, i32 4>
%r = icmp eq <2 x i32> %s1, %s2
ret <2 x i1> %r
}
diff --git a/llvm/test/Transforms/InstCombine/fcmp.ll b/llvm/test/Transforms/InstCombine/fcmp.ll
index 6c3091afcacaa..7816c623cd349 100644
--- a/llvm/test/Transforms/InstCombine/fcmp.ll
+++ b/llvm/test/Transforms/InstCombine/fcmp.ll
@@ -598,7 +598,7 @@ define i1 @is_signbit_set(double %x) {
define i1 @is_signbit_set_1(double %x) {
; CHECK-LABEL: @is_signbit_set_1(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 1.000000e+00, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ult double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ult double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double 1.0, double %x)
@@ -609,7 +609,7 @@ define i1 @is_signbit_set_1(double %x) {
define i1 @is_signbit_set_2(double %x) {
; CHECK-LABEL: @is_signbit_set_2(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 1.000000e+00, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ole double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ole double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double 1.0, double %x)
@@ -620,7 +620,7 @@ define i1 @is_signbit_set_2(double %x) {
define i1 @is_signbit_set_3(double %x) {
; CHECK-LABEL: @is_signbit_set_3(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 1.000000e+00, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ule double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ule double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double 1.0, double %x)
@@ -646,7 +646,7 @@ define <2 x i1> @is_signbit_set_anyzero(<2 x double> %x) {
define i1 @is_signbit_clear(double %x) {
; CHECK-LABEL: @is_signbit_clear(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 4.200000e+01, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ogt double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ogt double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double -42.0, double %x)
@@ -657,7 +657,7 @@ define i1 @is_signbit_clear(double %x) {
define i1 @is_signbit_clear_1(double %x) {
; CHECK-LABEL: @is_signbit_clear_1(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 4.200000e+01, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ugt double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ugt double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double -42.0, double %x)
@@ -668,7 +668,7 @@ define i1 @is_signbit_clear_1(double %x) {
define i1 @is_signbit_clear_2(double %x) {
; CHECK-LABEL: @is_signbit_clear_2(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 4.200000e+01, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp oge double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan oge double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double -42.0, double %x)
@@ -679,7 +679,7 @@ define i1 @is_signbit_clear_2(double %x) {
define i1 @is_signbit_clear_3(double %x) {
; CHECK-LABEL: @is_signbit_clear_3(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 4.200000e+01, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp uge double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan uge double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double -42.0, double %x)
@@ -693,7 +693,7 @@ define i1 @is_signbit_set_extra_use(double %x, ptr %p) {
; CHECK-LABEL: @is_signbit_set_extra_use(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 1.000000e+00, double [[X:%.*]])
; CHECK-NEXT: store double [[S]], ptr [[P:%.*]], align 8
-; CHECK-NEXT: [[R:%.*]] = fcmp olt double [[S]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan olt double [[S]], 0.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double 1.0, double %x)
@@ -707,7 +707,7 @@ define i1 @is_signbit_set_extra_use(double %x, ptr %p) {
define i1 @is_signbit_clear_nonzero(double %x) {
; CHECK-LABEL: @is_signbit_clear_nonzero(
; CHECK-NEXT: [[S:%.*]] = call double @llvm.copysign.f64(double 4.200000e+01, double [[X:%.*]])
-; CHECK-NEXT: [[R:%.*]] = fcmp ogt double [[S]], 1.000000e+00
+; CHECK-NEXT: [[R:%.*]] = fcmp nnan ogt double [[S]], 1.000000e+00
; CHECK-NEXT: ret i1 [[R]]
;
%s = call double @llvm.copysign.f64(double -42.0, double %x)
@@ -1852,7 +1852,7 @@ define i1 @same_const_sub_no_fold_large_c(i32 %x) {
; CHECK-LABEL: @same_const_sub_no_fold_large_c(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[X:%.*]] to float
; CHECK-NEXT: [[S:%.*]] = fsub float f0x4BFFFFFF, [[F]]
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[S]], f0x4BFFFFFF
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[S]], f0x4BFFFFFF
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %x to float
@@ -1889,7 +1889,7 @@ define i1 @same_const_sub_no_fold_subnormal_c(i32 %x) {
; CHECK-LABEL: @same_const_sub_no_fold_subnormal_c(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[X:%.*]] to float
; CHECK-NEXT: [[S:%.*]] = fsub float 1.401300e-45, [[F]]
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt float [[S]], 1.401300e-45
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan olt float [[S]], 1.401300e-45
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %x to float
@@ -1902,7 +1902,7 @@ define i1 @same_const_sub_no_fold_wrong_mantissa_width(i32 %x) {
; CHECK-LABEL: @same_const_sub_no_fold_wrong_mantissa_width(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[X:%.*]] to float
; CHECK-NEXT: [[S:%.*]] = fsub float f0x4C000000, [[F]]
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[S]], f0x4C000000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq float [[S]], f0x4C000000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %x to float
@@ -1926,7 +1926,7 @@ define i1 @same_const_sub_no_fold_x86_fp80_large_c(i32 %x) {
; CHECK-LABEL: @same_const_sub_no_fold_x86_fp80_large_c(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[X:%.*]] to x86_fp80
; CHECK-NEXT: [[S:%.*]] = fsub x86_fp80 f0x403F8000000000000000, [[F]]
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq x86_fp80 [[S]], f0x403F8000000000000000
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq x86_fp80 [[S]], f0x403F8000000000000000
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %x to x86_fp80
@@ -1940,7 +1940,7 @@ define i1 @same_const_sub_no_fold_ppcfp128(i32 %x) {
; CHECK-LABEL: @same_const_sub_no_fold_ppcfp128(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[X:%.*]] to ppc_fp128
; CHECK-NEXT: [[S:%.*]] = fsub ppc_fp128 1.000000e+00, [[F]]
-; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq ppc_fp128 [[S]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan oeq ppc_fp128 [[S]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %x to ppc_fp128
@@ -2627,7 +2627,7 @@ define i1 @fabs_uitofp_sub_ule_one(i16 %x, i16 %y) {
; CHECK-NEXT: [[FY:%.*]] = uitofp i16 [[Y:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp ule float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan ule float [[ABS]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = uitofp i16 %x to float
@@ -2644,7 +2644,7 @@ define i1 @fabs_sitofp_sub_ole_one(i16 %x, i16 %y) {
; CHECK-NEXT: [[FY:%.*]] = sitofp i16 [[Y:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp ole float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan ole float [[ABS]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = sitofp i16 %x to float
@@ -2689,7 +2689,7 @@ define i1 @fabs_uitofp_sub_olt_two_no_fold(i16 %x, i16 %y) {
; CHECK-NEXT: [[FY:%.*]] = uitofp i16 [[Y:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt float [[ABS]], 2.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan olt float [[ABS]], 2.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = uitofp i16 %x to float
@@ -2706,7 +2706,7 @@ define i1 @fabs_sitofp_sub_olt_one_i32_no_fold(i32 %x, i32 %y) {
; CHECK-NEXT: [[FY:%.*]] = sitofp i32 [[Y:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan olt float [[ABS]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = sitofp i32 %x to float
@@ -2724,7 +2724,7 @@ define i1 @fabs_sitofp_sub_ogt_one(i16 %x, i16 %y) {
; CHECK-NEXT: [[FY:%.*]] = sitofp i16 [[Y:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan ogt float [[ABS]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = sitofp i16 %x to float
@@ -2741,7 +2741,7 @@ define i1 @fabs_argstype_mismatch(i16 %x, i32 %y) {
; CHECK-NEXT: [[FY1:%.*]] = sitofp i32 [[Y1:%.*]] to float
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[FY]], [[FY1]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan ogt float [[ABS]], 1.000000e+00
; CHECK-NEXT: ret i1 [[CMP]]
;
%fx = sitofp i16 %x to float
@@ -2825,7 +2825,7 @@ define <2 x i1> @fabs_uitofp_sub_vec_bf16_no_fold(<2 x i16> %x, <2 x i16> %y) {
; CHECK-NEXT: [[FY:%.*]] = uitofp <2 x i16> [[Y:%.*]] to <2 x bfloat>
; CHECK-NEXT: [[SUB:%.*]] = fsub <2 x bfloat> [[FX]], [[FY]]
; CHECK-NEXT: [[ABS:%.*]] = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> [[SUB]])
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <2 x bfloat> [[ABS]], splat (bfloat 1.000000e+00)
+; CHECK-NEXT: [[CMP:%.*]] = fcmp nnan olt <2 x bfloat> [[ABS]], splat (bfloat 1.000000e+00)
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%fx = uitofp <2 x i16> %x to <2 x bfloat>
diff --git a/llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll b/llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
index d4f4dde646e65..636ef12a546ff 100644
--- a/llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
+++ b/llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
@@ -78,7 +78,7 @@ define i1 @test3(float %x) {
; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[X]], 3.000000e+00
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[RET:%.*]] = fcmp oeq float [[X]], +inf
+; CHECK-NEXT: [[RET:%.*]] = fcmp nnan oeq float [[X]], +inf
; CHECK-NEXT: ret i1 [[RET]]
; CHECK: if.else:
; CHECK-NEXT: ret i1 false
@@ -159,7 +159,7 @@ define i1 @test6(double %x) {
; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[X]], 0.000000e+00
; CHECK-NEXT: br i1 [[CMP]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
; CHECK: land.rhs:
-; CHECK-NEXT: [[CMP_I:%.*]] = fcmp oeq double [[X]], +inf
+; CHECK-NEXT: [[CMP_I:%.*]] = fcmp nnan oeq double [[X]], +inf
; CHECK-NEXT: br label [[LAND_END]]
; CHECK: land.end:
; CHECK-NEXT: [[RET:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP_I]], [[LAND_RHS]] ]
diff --git a/llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll b/llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
index 7226e64b30971..56e32007e24ae 100644
--- a/llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
+++ b/llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
@@ -11,7 +11,7 @@ define float @frexp_fcmp_ogt_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ogt_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ogt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ogt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -43,7 +43,7 @@ define float @frexp_fcmp_oge_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_oge_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ult float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ult float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -73,7 +73,7 @@ define float @frexp_fcmp_ugt_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ugt_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ugt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ugt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -105,7 +105,7 @@ define float @frexp_fcmp_uge_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_uge_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp uge float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan uge float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -135,7 +135,7 @@ define float @frexp_fcmp_olt_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_olt_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -165,7 +165,7 @@ define float @frexp_fcmp_ole_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ole_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ugt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ugt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -198,7 +198,7 @@ define float @frexp_fcmp_ult_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ult_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ult float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ult float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -228,7 +228,7 @@ define float @frexp_fcmp_ule_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ule_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ule float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ule float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -260,7 +260,7 @@ define float @frexp_cmp_ugt_0.5(float nofpclass(nan inf) %x, float nofpclass(inf
; CHECK-LABEL: define float @frexp_cmp_ugt_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ugt float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ugt float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -290,7 +290,7 @@ define float @frexp_cmp_uge_0.5(float nofpclass(nan inf) %x, float nofpclass(inf
; CHECK-LABEL: define float @frexp_cmp_uge_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp uge float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan uge float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -320,7 +320,7 @@ define float @frexp_fcmp_ult_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_ult_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ult float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ult float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -350,7 +350,7 @@ define float @frexp_fcmp_ule_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_ule_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ule float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ule float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -380,7 +380,7 @@ define float @frexp_fcmp_ugt_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_ugt_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ugt float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ugt float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -410,7 +410,7 @@ define float @frexp_fcmp_uge_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_uge_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp uge float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan uge float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -440,7 +440,7 @@ define float @frexp_fcmp_oeq_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_oeq_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp oeq float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp nnan oeq float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -472,7 +472,7 @@ define float @frexp_fcmp_ueq_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_ueq_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp ueq float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp nnan ueq float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -504,7 +504,7 @@ define float @frexp_fcmp_one_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_one_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp ueq float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp nnan ueq float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_NOT_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -536,7 +536,7 @@ define float @frexp_fcmp_une_1(float nofpclass(nan inf) %x, float nofpclass(inf)
; CHECK-LABEL: define float @frexp_fcmp_une_1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp une float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp nnan une float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_NOT_ONE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -568,7 +568,7 @@ define float @frexp_fcmp_oeq_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_oeq_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp oeq float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp nnan oeq float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -598,7 +598,7 @@ define float @frexp_fcmp_ueq_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_ueq_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp ueq float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_ONE:%.*]] = fcmp nnan ueq float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -628,7 +628,7 @@ define float @frexp_fcmp_one_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_one_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp ueq float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp nnan ueq float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_NOT_ONE]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -658,7 +658,7 @@ define float @frexp_fcmp_une_0.5(float nofpclass(nan inf) %x, float nofpclass(in
; CHECK-LABEL: define float @frexp_fcmp_une_0.5(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp une float [[X_FABS]], 5.000000e-01
+; CHECK-NEXT: [[IS_NOT_ONE:%.*]] = fcmp nnan une float [[X_FABS]], 5.000000e-01
; CHECK-NEXT: br i1 [[IS_NOT_ONE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -799,7 +799,7 @@ define float @frexp_fcmp_ogt_nextafter1(float nofpclass(nan inf) %x, float nofpc
; CHECK-LABEL: define float @frexp_fcmp_ogt_nextafter1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ogt float [[X_FABS]], f0x3F800001
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ogt float [[X_FABS]], f0x3F800001
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -832,7 +832,7 @@ define float @frexp_fcmp_ole_nextafter1(float nofpclass(nan inf) %x, float nofpc
; CHECK-LABEL: define float @frexp_fcmp_ole_nextafter1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ugt float [[X_FABS]], f0x3F800001
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ugt float [[X_FABS]], f0x3F800001
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -865,7 +865,7 @@ define float @frexp_fcmp_ogt_nextdown1(float nofpclass(nan inf) %x, float nofpcl
; CHECK-LABEL: define float @frexp_fcmp_ogt_nextdown1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ogt float [[X_FABS]], f0x3F7FFFFF
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ogt float [[X_FABS]], f0x3F7FFFFF
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -896,7 +896,7 @@ define float @frexp_fcmp_ole_nextdown1(float nofpclass(nan inf) %x, float nofpcl
; CHECK-LABEL: define float @frexp_fcmp_ole_nextdown1(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp ugt float [[X_FABS]], f0x3F7FFFFF
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan ugt float [[X_FABS]], f0x3F7FFFFF
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -987,7 +987,7 @@ define float @frexp_fcmp_olt_1_not_dominated(float nofpclass(nan inf) %x, float
; CHECK-NEXT: br i1 [[ARG]], label %[[GUARD:.*]], label %[[SMALL:.*]]
; CHECK: [[GUARD]]:
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL]], label %[[EXIT:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1025,10 +1025,10 @@ define float @frexp_fcmp_olt_1_multiple_conditions_wrong_constant(float nofpclas
; CHECK-LABEL: define float @frexp_fcmp_olt_1_multiple_conditions_wrong_constant(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp olt float [[X_FABS]], 2.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan olt float [[X_FABS]], 2.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[EXIT:.*]]
; CHECK: [[SMALL]]:
-; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[OTHER_COND]], label %[[BODY:.*]], label %[[EXIT]]
; CHECK: [[BODY]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1066,7 +1066,7 @@ define float @frexp_fcmp_olt_1_multiple_conditions_nonfinite_constant(float nofp
; CHECK-NEXT: br i1 true, label %[[SMALL:.*]], label %[[EXIT:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[OTHER_COND]], label %[[BODY:.*]], label %[[EXIT]]
; CHECK: [[BODY]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1102,7 +1102,7 @@ define float @frexp_fcmp_olt_1_multiple_conditions_edge_case_compare(float nofpc
; CHECK-NEXT: br i1 true, label %[[SMALL:.*]], label %[[EXIT:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[OTHER_COND]], label %[[BODY:.*]], label %[[EXIT]]
; CHECK: [[BODY]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1137,10 +1137,10 @@ define float @frexp_fcmp_olt_1_multiple_conditions_other(float nofpclass(nan inf
; CHECK-LABEL: define float @frexp_fcmp_olt_1_multiple_conditions_other(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp olt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_SMALL:%.*]] = fcmp nnan olt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_SMALL]], label %[[SMALL:.*]], label %[[EXIT:.*]]
; CHECK: [[SMALL]]:
-; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp ueq float [[X]], 5.000000e-01
+; CHECK-NEXT: [[OTHER_COND:%.*]] = fcmp nnan ueq float [[X]], 5.000000e-01
; CHECK-NEXT: br i1 [[OTHER_COND]], label %[[EXIT]], label %[[BODY:.*]]
; CHECK: [[BODY]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1175,7 +1175,7 @@ define float @frexp_fcmp_ogt_1_large_int(float nofpclass(nan inf) %x, float nofp
; CHECK-LABEL: define float @frexp_fcmp_ogt_1_large_int(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ogt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ogt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i128 } @llvm.frexp.f32.i128(float [[X]])
@@ -1208,7 +1208,7 @@ define float @frexp_fcmp_ogt_1_fabs_wrong_value(float nofpclass(nan inf) %x, flo
; CHECK-LABEL: define float @frexp_fcmp_ogt_1_fabs_wrong_value(
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]], float nofpclass(inf) [[NOT_INF:%.*]]) {
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp ogt float [[X_FABS]], 1.000000e+00
+; CHECK-NEXT: [[IS_LARGE:%.*]] = fcmp nnan ogt float [[X_FABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[IS_LARGE]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FREXP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X_FABS]])
@@ -1241,7 +1241,7 @@ define i1 @issue208192(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1276,7 +1276,7 @@ define i1 @frexp_exp_ogt_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ogt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ogt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1303,7 +1303,7 @@ define i1 @frexp_exp_ogt_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ogt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ogt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1333,7 +1333,7 @@ define i1 @frexp_exp_oge_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ult float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ult float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1360,7 +1360,7 @@ define i1 @frexp_exp_oge_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ult float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ult float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1390,7 +1390,7 @@ define i1 @frexp_exp_ugt_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1417,7 +1417,7 @@ define i1 @frexp_exp_ugt_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1447,7 +1447,7 @@ define i1 @frexp_exp_uge_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp uge float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan uge float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1474,7 +1474,7 @@ define i1 @frexp_exp_uge_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp uge float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan uge float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1504,7 +1504,7 @@ define i1 @frexp_exp_olt_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1531,7 +1531,7 @@ define i1 @frexp_exp_olt_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1561,7 +1561,7 @@ define i1 @frexp_exp_ole_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1588,7 +1588,7 @@ define i1 @frexp_exp_ole_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1618,7 +1618,7 @@ define i1 @frexp_exp_ult_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ult float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ult float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1645,7 +1645,7 @@ define i1 @frexp_exp_ult_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ult float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ult float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1675,7 +1675,7 @@ define i1 @frexp_exp_ule_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ule float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ule float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1702,7 +1702,7 @@ define i1 @frexp_exp_ule_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ule float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ule float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1732,7 +1732,7 @@ define i1 @frexp_exp_oeq_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp oeq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan oeq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1759,7 +1759,7 @@ define i1 @frexp_exp_oeq_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp oeq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan oeq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1789,7 +1789,7 @@ define i1 @frexp_exp_ueq_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ueq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1816,7 +1816,7 @@ define i1 @frexp_exp_ueq_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ueq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1846,7 +1846,7 @@ define i1 @frexp_exp_one_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ueq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1873,7 +1873,7 @@ define i1 @frexp_exp_one_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ueq float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1903,7 +1903,7 @@ define i1 @frexp_exp_une_1_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp une float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan une float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -1930,7 +1930,7 @@ define i1 @frexp_exp_une_1_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp une float [[ABS]], 1.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan une float [[ABS]], 1.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1961,7 +1961,7 @@ define i1 @frexp_exp_olt_below1_zero_input(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -1993,7 +1993,7 @@ define i1 @frexp_exp_olt_quarter_nonzero_fold(float nofpclass(nan inf zero) %x)
; CHECK-SAME: float nofpclass(nan inf zero) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2020,7 +2020,7 @@ define i1 @frexp_exp_olt_quarter_nonzero_nofold(float nofpclass(nan inf zero) %x
; CHECK-SAME: float nofpclass(nan inf zero) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2052,7 +2052,7 @@ define i1 @frexp_exp_olt_quarter_maybezero_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2079,7 +2079,7 @@ define i1 @frexp_exp_olt_quarter_maybezero_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2111,7 +2111,7 @@ define i1 @frexp_exp_olt_0p75_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 7.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 7.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2138,7 +2138,7 @@ define i1 @frexp_exp_olt_0p75_nofold(float nofpclass(nan inf zero) %x) {
; CHECK-SAME: float nofpclass(nan inf zero) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 7.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 7.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2169,7 +2169,7 @@ define i1 @frexp_exp_olt_4_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 4.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 4.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2196,7 +2196,7 @@ define i1 @frexp_exp_olt_4_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 4.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 4.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2228,7 +2228,7 @@ define i1 @frexp_exp_ole_4_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 4.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 4.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2255,7 +2255,7 @@ define i1 @frexp_exp_ole_4_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 4.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 4.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2287,7 +2287,7 @@ define i1 @frexp_exp_olt_3_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 3.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 3.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2314,7 +2314,7 @@ define i1 @frexp_exp_olt_3_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 3.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 3.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2344,7 +2344,7 @@ define i1 @frexp_exp_ole_3_fold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 3.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 3.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: ret i1 true
@@ -2371,7 +2371,7 @@ define i1 @frexp_exp_ole_3_nofold(float nofpclass(nan inf) %x) {
; CHECK-SAME: float nofpclass(nan inf) [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp ugt float [[ABS]], 3.000000e+00
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan ugt float [[ABS]], 3.000000e+00
; CHECK-NEXT: br i1 [[C]], label %[[LARGE:.*]], label %[[SMALL:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
@@ -2402,7 +2402,7 @@ define i1 @frexp_exp_denormal_dynamic_nofold(float nofpclass(nan inf zero) %x) #
; CHECK-SAME: float nofpclass(nan inf zero) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[X]])
-; CHECK-NEXT: [[C:%.*]] = fcmp olt float [[ABS]], 2.500000e-01
+; CHECK-NEXT: [[C:%.*]] = fcmp nnan olt float [[ABS]], 2.500000e-01
; CHECK-NEXT: br i1 [[C]], label %[[SMALL:.*]], label %[[LARGE:.*]]
; CHECK: [[SMALL]]:
; CHECK-NEXT: [[FX:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[X]])
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index 4f338f0df50e9..a2ef47e67d003 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -2550,7 +2550,7 @@ define i1 @test_class_is_inf_or_nan_noinf_src(float nofpclass(inf) %arg) {
define i1 @test_class_is_inf_or_nan_nonan_src(float nofpclass(nan) %arg) {
; CHECK-LABEL: @test_class_is_inf_or_nan_nonan_src(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]])
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], +inf
+; CHECK-NEXT: [[CLASS:%.*]] = fcmp nnan ueq float [[TMP1]], +inf
; CHECK-NEXT: ret i1 [[CLASS]]
;
%class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519)
diff --git a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-exp.ll b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-exp.ll
index 56ca3a8134f8b..b05240ccd5f77 100644
--- a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-exp.ll
+++ b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-exp.ll
@@ -372,8 +372,8 @@ define nofpclass(pzero) float @source_is_known_nzero(float nofpclass(nan inf nor
define nofpclass(nzero) float @source_is_known_inf(float nofpclass(nan norm sub zero) %must.be.inf) !prof !0 {
; CHECK-LABEL: define nofpclass(nzero) float @source_is_known_inf(
; CHECK-SAME: float nofpclass(nan zero sub norm) [[MUST_BE_INF:%.*]]) !prof [[PROF0:![0-9]+]] {
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq float [[MUST_BE_INF]], +inf
-; CHECK-NEXT: [[EXP:%.*]] = select i1 [[TMP1]], float [[MUST_BE_INF]], float 0.000000e+00, !prof [[PROF1:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = fcmp nnan ueq float [[MUST_BE_INF]], +inf
+; CHECK-NEXT: [[EXP:%.*]] = select i1 [[TMP1]], float +inf, float 0.000000e+00, !prof [[PROF1:![0-9]+]]
; CHECK-NEXT: ret float [[EXP]]
;
%exp = call float @llvm.exp2.f32(float %must.be.inf)
@@ -383,8 +383,8 @@ define nofpclass(nzero) float @source_is_known_inf(float nofpclass(nan norm sub
define nofpclass(nzero) <2 x float> @source_is_known_inf_vec(<2 x float> nofpclass(nan norm sub zero) %must.be.inf) {
; CHECK-LABEL: define nofpclass(nzero) <2 x float> @source_is_known_inf_vec(
; CHECK-SAME: <2 x float> nofpclass(nan zero sub norm) [[MUST_BE_INF:%.*]]) {
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq <2 x float> [[MUST_BE_INF]], splat (float +inf)
-; CHECK-NEXT: [[EXP:%.*]] = select <2 x i1> [[TMP1]], <2 x float> [[MUST_BE_INF]], <2 x float> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = fcmp nnan ueq <2 x float> [[MUST_BE_INF]], splat (float +inf)
+; CHECK-NEXT: [[EXP:%.*]] = select <2 x i1> [[TMP1]], <2 x float> splat (float +inf), <2 x float> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[EXP]]
;
%exp = call <2 x float> @llvm.exp2.v2f32(<2 x float> %must.be.inf)
diff --git a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
index 2a3487a1b9ca7..66cabe3b9f0ec 100644
--- a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
+++ b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
@@ -289,7 +289,7 @@ define nofpclass(inf) half @ret_noinf_self(half noundef %x) {
define nofpclass(snan) half @ret_src_nonan_noinf_self(half noundef nofpclass(nan inf) %x) {
; CHECK-LABEL: define nofpclass(snan) half @ret_src_nonan_noinf_self(
; CHECK-SAME: half noundef nofpclass(nan inf) [[X:%.*]]) {
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq half [[X]], 0.000000e+00
+; CHECK-NEXT: [[TMP1:%.*]] = fcmp nnan ueq half [[X]], 0.000000e+00
; CHECK-NEXT: [[DIV:%.*]] = select i1 [[TMP1]], half +qnan, half 1.000000e+00
; CHECK-NEXT: ret half [[DIV]]
;
diff --git a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
index 6870f2967a460..a6d020cf3cfe4 100644
--- a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
@@ -1502,10 +1502,10 @@ define nofpclass(nan inf nzero nsub nnorm) float @powr_issue64870(float nofpclas
; CHECK-NEXT: [[I1:%.*]] = tail call nnan float @llvm.log2.f32(float [[I]])
; CHECK-NEXT: [[I2:%.*]] = fmul nnan float [[I1]], [[Y]]
; CHECK-NEXT: [[I3:%.*]] = tail call nnan nofpclass(ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[I2]])
-; CHECK-NEXT: [[I6:%.*]] = fcmp oeq float [[X]], 0.000000e+00
+; CHECK-NEXT: [[I6:%.*]] = fcmp nnan oeq float [[X]], 0.000000e+00
; CHECK-NEXT: [[I7:%.*]] = select i1 [[I6]], float 0.000000e+00, float [[I3]]
-; CHECK-NEXT: [[I8:%.*]] = fcmp oeq float [[Y]], 0.000000e+00
-; CHECK-NEXT: [[I11:%.*]] = fcmp oeq float [[X]], 1.000000e+00
+; CHECK-NEXT: [[I8:%.*]] = fcmp nnan oeq float [[Y]], 0.000000e+00
+; CHECK-NEXT: [[I11:%.*]] = fcmp nnan oeq float [[X]], 1.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[I11]], i1 true, i1 [[I8]]
; CHECK-NEXT: [[I12:%.*]] = select i1 [[TMP0]], float 1.000000e+00, float [[I7]]
; CHECK-NEXT: ret float [[I12]]
@@ -1537,8 +1537,8 @@ define nofpclass(nan inf nzero nsub nnorm) float @test_powr_issue64870_2(float n
; CHECK-NEXT: [[I3:%.*]] = tail call nnan float @llvm.log2.f32(float [[ARG]])
; CHECK-NEXT: [[I5:%.*]] = fmul nnan float [[ARG1]], [[I3]]
; CHECK-NEXT: [[I6:%.*]] = tail call nnan nofpclass(ninf nzero nsub nnorm) float @llvm.exp2.f32(float [[I5]])
-; CHECK-NEXT: [[TMP0:%.*]] = fcmp oeq float [[ARG]], 0.000000e+00
-; CHECK-NEXT: [[I12:%.*]] = select i1 [[TMP0]], float 0.000000e+00, float [[I6]]
+; CHECK-NEXT: [[I10:%.*]] = fcmp nnan oeq float [[ARG]], 0.000000e+00
+; CHECK-NEXT: [[I12:%.*]] = select i1 [[I10]], float 0.000000e+00, float [[I6]]
; CHECK-NEXT: ret float [[I12]]
;
bb:
@@ -1568,19 +1568,19 @@ define nofpclass(nan inf) float @pow_f32(float nofpclass(nan inf) %arg, float no
; CHECK-NEXT: [[I4:%.*]] = tail call nnan float @llvm.exp2.f32(float [[I3]])
; CHECK-NEXT: [[I5:%.*]] = tail call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float noundef [[ARG1]])
; CHECK-NEXT: [[I6:%.*]] = tail call float @llvm.trunc.f32(float noundef [[I5]])
-; CHECK-NEXT: [[I7:%.*]] = fcmp oeq float [[I6]], [[I5]]
+; CHECK-NEXT: [[I7:%.*]] = fcmp nnan oeq float [[I6]], [[I5]]
; CHECK-NEXT: [[I8:%.*]] = fmul nnan float [[I5]], 5.000000e-01
; CHECK-NEXT: [[I9:%.*]] = tail call float @llvm.trunc.f32(float noundef [[I8]])
-; CHECK-NEXT: [[I10:%.*]] = fcmp une float [[I9]], [[I8]]
+; CHECK-NEXT: [[I10:%.*]] = fcmp nnan une float [[I9]], [[I8]]
; CHECK-NEXT: [[I11:%.*]] = and i1 [[I7]], [[I10]]
; CHECK-NEXT: [[I12:%.*]] = select i1 [[I11]], float [[ARG]], float 1.000000e+00
; CHECK-NEXT: [[I13:%.*]] = tail call noundef float @llvm.copysign.f32(float noundef [[I4]], float noundef [[I12]])
-; CHECK-NEXT: [[I17:%.*]] = fcmp oeq float [[ARG]], 0.000000e+00
+; CHECK-NEXT: [[I17:%.*]] = fcmp nnan oeq float [[ARG]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call nofpclass(nan sub norm) float @llvm.copysign.f32(float 0.000000e+00, float [[ARG]])
; CHECK-NEXT: [[I22:%.*]] = select i1 [[I11]], float [[TMP0]], float 0.000000e+00
; CHECK-NEXT: [[I23:%.*]] = select i1 [[I17]], float [[I22]], float [[I13]]
-; CHECK-NEXT: [[I24:%.*]] = fcmp oeq float [[ARG]], 1.000000e+00
-; CHECK-NEXT: [[I25:%.*]] = fcmp oeq float [[ARG1]], 0.000000e+00
+; CHECK-NEXT: [[I24:%.*]] = fcmp nnan oeq float [[ARG]], 1.000000e+00
+; CHECK-NEXT: [[I25:%.*]] = fcmp nnan oeq float [[ARG1]], 0.000000e+00
; CHECK-NEXT: [[I26:%.*]] = or i1 [[I24]], [[I25]]
; CHECK-NEXT: [[I27:%.*]] = select i1 [[I26]], float 1.000000e+00, float [[I23]]
; CHECK-NEXT: ret float [[I27]]
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