[llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)

Mel Chen via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 14 05:05:15 PDT 2026


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@@ -7772,9 +7769,11 @@ void VPlanTransforms::convertToStridedAccesses(VPlan &Plan,
                                          : GEPNoWrapFlags::none());
 
       // Create a new vector pointer for strided access.
+      auto *PtrR = dyn_cast<VPRecipeWithIRFlags>(Ptr);
       VPValue *NewPtr = Builder.createVectorPointer(
           BasePtr, Type::getInt8Ty(Plan.getContext()), StrideInBytes,
-          Ptr->getGEPNoWrapFlags(), Ptr->getDebugLoc());
+          PtrR ? PtrR->getGEPNoWrapFlagsOrNone() : GEPNoWrapFlags::none(),
----------------
Mel-Chen wrote:

Checked all the flag settings and try to address this in #209453, thanks.

https://github.com/llvm/llvm-project/pull/209168


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