[llvm] [SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (PR #210515)

[Matt Arsenault via llvm-commits]

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@@ -3234,6 +3237,21 @@ SDValue DAGTypeLegalizer::SoftPromoteHalfOp_BITCAST(SDNode *N) {
   return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), Op0);
 }
 
+SDValue DAGTypeLegalizer::SoftPromoteHalfOp_BUILD_VECTOR(SDNode *N) {
+  SDLoc dl(N);
+  EVT VT = N->getValueType(0);
+  assert(VT.isVector() && VT.getVectorElementType() == MVT::f16);
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arsenm wrote:

```suggestion
```

Not really necessary 

https://github.com/llvm/llvm-project/pull/210515