[llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index f0e4d70bb..f468baddb 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -16549,10 +16549,12 @@ static SDValue tryLowerToBSL(SDValue N, SelectionDAG &DAG) {
                            N0->getOperand(1 - i), N1->getOperand(1 - j));
     }
 
-  // Fold: or(and(xor(setcc(and(X,Mask), Mask, eq), -1), A), and(setcc(and(X,Mask), Mask, eq), B))
+  // Fold: or(and(xor(setcc(and(X,Mask), Mask, eq), -1), A),
+  // and(setcc(and(X,Mask), Mask, eq), B))
   // --> BSP(setcc(and(X,Mask), 0, ne), A, B)
-  // (X & Mask) == Mask, for a power-of-2 Mask, is equivalent to (X & Mask) != 0.
-  // The latter lowers to CMTST (one instruction) instead of AND+CMEQ (two instructions).
+  // (X & Mask) == Mask, for a power-of-2 Mask, is equivalent to (X & Mask) !=
+  // 0. The latter lowers to CMTST (one instruction) instead of AND+CMEQ (two
+  // instructions).
   for (int i = 1; i >= 0; --i)
     for (int j = 1; j >= 0; --j) {
       SDValue NotMask = N0->getOperand(i);

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https://github.com/llvm/llvm-project/pull/209100