[llvm] b1a6a90 - [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (#208392)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 14 06:37:13 PDT 2026
Author: Vachan
Date: 2026-07-14T13:37:07Z
New Revision: b1a6a90dff53b60d66f49516938ef47344a45699
URL: https://github.com/llvm/llvm-project/commit/b1a6a90dff53b60d66f49516938ef47344a45699
DIFF: https://github.com/llvm/llvm-project/commit/b1a6a90dff53b60d66f49516938ef47344a45699.diff
LOG: [X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (#208392)
fixes #193178
Added:
llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
Modified:
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 7b459f76b012f..651714d067faf 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -4993,6 +4993,18 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
}
return FlagI.isIdenticalTo(OI);
}
+ case X86::LZCNT16rr:
+ case X86::LZCNT32rr:
+ case X86::LZCNT64rr:
+ case X86::TZCNT16rr:
+ case X86::TZCNT32rr:
+ case X86::TZCNT64rr: {
+ if (ImmMask != 0 && !SrcReg2.isValid() && ImmValue == 1 &&
+ OI.getOperand(1).isReg() && SrcReg == OI.getOperand(1).getReg()) {
+ return true;
+ }
+ return false;
+ }
default:
return false;
}
diff --git a/llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll b/llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
index d3d6b25b60c16..0a159143efa74 100644
--- a/llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
+++ b/llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
@@ -101,9 +101,7 @@ define i64 @popcnt64_load_cmov(ptr %p0, i64 %a1) {
define i32 @lzcnt32_no_fold_nonzero_cmp(ptr %p0, i32 %a1) {
; CHECK-LABEL: lzcnt32_no_fold_nonzero_cmp:
; CHECK: # %bb.0:
-; CHECK-NEXT: movl (%rdi), %ecx
-; CHECK-NEXT: lzcntl %ecx, %eax
-; CHECK-NEXT: cmpl $1, %ecx
+; CHECK-NEXT: lzcntl (%rdi), %eax
; CHECK-NEXT: cmovel %esi, %eax
; CHECK-NEXT: retq
%v = load i32, ptr %p0, align 4
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
new file mode 100644
index 0000000000000..82d10a5688cfa
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
@@ -0,0 +1,76 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s
+
+define i64 @remove_redundant_cmp_ult_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ult_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rax
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ult i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ugt_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ugt_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: sbbq $-1, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ugt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ne_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ne_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ne i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sge_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sge_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testq %rdi, %rdi
+; CHECK-NEXT: setg %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp sge i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sle_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sle_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: setl %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp sle i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
new file mode 100644
index 0000000000000..7658e7e96c93c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
@@ -0,0 +1,186 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86
+
+define i32 @remove_redundant_cmp_eq_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_eq_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_eq_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 0
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_uge_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_uge_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: sbbl $-1, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_uge_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sbbl $-1, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp uge i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ule_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ule_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ule_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp ule i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_slt_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_slt_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: testl %edi, %edi
+; X64-NEXT: setle %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_slt_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: testl %ecx, %ecx
+; X86-NEXT: setle %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp slt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sgt_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sgt_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: setge %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sgt_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setge %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp sgt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i16 @remove_redundant_cmp_lzcnt_i16(i16 %0) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_i16:
+; X64: # %bb.0:
+; X64-NEXT: lzcntw %di, %ax
+; X64-NEXT: adcw $0, %ax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_i16:
+; X86: # %bb.0:
+; X86-NEXT: lzcntw {{[0-9]+}}(%esp), %ax
+; X86-NEXT: adcw $0, %ax
+; X86-NEXT: retl
+ %2 = tail call i16 @llvm.ctlz.i16(i16 %0, i1 false)
+ %3 = icmp eq i16 %0, 0
+ %4 = zext i1 %3 to i16
+ %5 = add nuw nsw i16 %2, %4
+ ret i16 %5
+}
+
+define i32 @remove_redundant_cmp_lzcnt_no_constant(i32 %0, i32 %1) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_no_constant:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl %esi, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_no_constant:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %3 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %4 = icmp eq i32 %0, %1
+ %5 = zext i1 %4 to i32
+ %6 = add nuw nsw i32 %3, %5
+ ret i32 %6
+}
+
+define i32 @remove_redundant_cmp_lzcnt_wrong_const(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_wrong_const:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_wrong_const:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 2
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
new file mode 100644
index 0000000000000..a378156c639ef
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
@@ -0,0 +1,74 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s
+
+define i64 @remove_redundant_cmp_eq_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_eq_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp eq i64 %0, 0
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_uge_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_uge_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: sbbq $-1, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp uge i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ule_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ule_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp ule i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_slt_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_slt_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testq %rdi, %rdi
+; CHECK-NEXT: setle %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp slt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sgt_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sgt_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: setge %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp sgt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
new file mode 100644
index 0000000000000..0dee74e413066
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
@@ -0,0 +1,199 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86
+
+define i32 @remove_redundant_cmp_ult_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ult_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %eax
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ult_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ult i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ugt_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ugt_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sbbl $-1, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ugt_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sbbl $-1, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ugt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ne_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ne_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: setne %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ne_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: tzcntl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: setne %al
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ne i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sge_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sge_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: testl %edi, %edi
+; X64-NEXT: setg %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sge_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: testl %ecx, %ecx
+; X86-NEXT: setg %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp sge i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sle_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sle_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: setl %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sle_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setl %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp sle i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i16 @remove_redundant_cmp_tzcnt_i16(i16 %0) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl $65536, %eax # imm = 0x10000
+; X64-NEXT: tzcntl %eax, %eax
+; X64-NEXT: cmpw $1, %di
+; X64-NEXT: adcw $0, %ax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_i16:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: orl $65536, %eax # imm = 0x10000
+; X86-NEXT: tzcntl %eax, %eax
+; X86-NEXT: cmpw $1, %cx
+; X86-NEXT: adcw $0, %ax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+ %2 = tail call i16 @llvm.cttz.i16(i16 %0, i1 false)
+ %3 = icmp eq i16 %0, 0
+ %4 = zext i1 %3 to i16
+ %5 = add nuw nsw i16 %2, %4
+ ret i16 %5
+}
+
+define i32 @remove_redundant_cmp_tzcnt_no_constant(i32 %0, i32 %1) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_no_constant:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl %esi, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_no_constant:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %3 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %4 = icmp eq i32 %0, %1
+ %5 = zext i1 %4 to i32
+ %6 = add nuw nsw i32 %3, %5
+ ret i32 %6
+}
+
+define i32 @remove_redundant_cmp_tzcnt_wrong_const(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_wrong_const:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_wrong_const:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 2
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
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