[llvm] [WIP][X86] Replace custom ADD reduction pattern matching with ISD::VECREDUCE_ADD support (PR #205098)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 13 01:31:21 PDT 2026

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https://github.com/RKSimon closed https://github.com/llvm/llvm-project/pull/205098

Previous message: [llvm] [AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider scalars (PR #207999)
Next message: [llvm] 3a61e72 - [ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (#203318)
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