[llvm] [X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (PR #210354)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 17 08:01:21 PDT 2026


https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/210354

For future reuse.

>From 5c8af093840caca370822a2550d3ed6b9571fa36 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Fri, 17 Jul 2026 16:00:07 +0100
Subject: [PATCH] [X86] Pull out isFoldableAsShuffle lamdba into helper
 function. NFC.

For future reuse.
---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 97e783c09f0f2..f9ec233bd4431 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -8184,6 +8184,13 @@ static bool isFoldableUseOfShuffle(SDNode *N) {
   return false;
 }
 
+static bool isFoldableAsShuffle(SDValue V) {
+  while (V.getOpcode() == ISD::BITCAST ||
+         V.getOpcode() == ISD::EXTRACT_SUBVECTOR)
+    V = V.getOperand(0);
+  return isTargetShuffle(V.getOpcode());
+}
+
 // If the node has a single use by a VSELECT then AVX512 targets may be able to
 // fold as a predicated instruction.
 static bool isMaskableNode(SDValue V, const X86Subtarget &Subtarget) {
@@ -61511,13 +61518,6 @@ static SDValue combineINSERT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
     }
   }
 
-  auto isFoldableAsShuffle = [](SDValue V) {
-    while (V.getOpcode() == ISD::BITCAST ||
-           V.getOpcode() == ISD::EXTRACT_SUBVECTOR)
-      V = V.getOperand(0);
-    return isTargetShuffle(V.getOpcode());
-  };
-
   // Match concat_vector style patterns.
   SmallVector<SDValue, 2> SubVectorOps;
   if (collectConcatOps(N, SubVectorOps, DAG)) {



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