[llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 14 05:46:26 PDT 2026
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp --diff_from_common_commit
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 93a3a9721..f070d677a 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -5844,7 +5844,7 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
return UnableToLegalize;
return fewerElementsVectorMerge(MI, TypeIdx, NarrowTy);
case G_EXTRACT_SUBVECTOR: {
- //dbgs() << "Ping!";
+ // dbgs() << "Ping!";
Register DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
Register SrcReg = MI.getOperand(1).getReg();
@@ -5858,7 +5858,8 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
if (2 * DstTy.getNumElements() != SrcTy.getNumElements())
return UnableToLegalize;
- // extract_subvector(large_vector) -> copy(high/low half of unmerge_values(large_vector, 2))
+ // extract_subvector(large_vector) -> copy(high/low half of
+ // unmerge_values(large_vector, 2))
auto Unmerge = MIRBuilder.buildUnmerge(DstTy, SrcReg);
if (InsertionPointImm == 0)
MIRBuilder.buildCopy(DstReg, Unmerge.getReg(0));
``````````
</details>
https://github.com/llvm/llvm-project/pull/207956
More information about the llvm-commits
mailing list