[llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)
Petar Avramovic via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 13 00:54:30 PDT 2026
================
@@ -2704,6 +2711,15 @@ bool AMDGPULegalizerInfo::legalizeAddrSpaceCast(
return true;
}
+bool AMDGPULegalizerInfo::legalizeBitcast(MachineInstr &MI,
+ MachineRegisterInfo &MRI,
+ MachineIRBuilder &B) const {
+ B.buildTrunc(MI.getOperand(0).getReg(),
----------------
petar-avramovic wrote:
this is tricky to implement using widenScalar, first need to implement widen scalar for bitcast, which is mostly fine, then need to write legalizer action that does not change given type (i32) which can be worked around using widenScalarIf. Bitcast has different TypeIdx on operand 0 and 1, so we need to call two widen scalars, still doable, but in the end we are left with `%4:_(i32) = G_BITCAST %5:_(i32)`, which is machine verifier error.
There is no good place to erase this bitcast that would appear while changing operand.
I wanted to:
```
%2:_(f16) = G_BITCAST %1:_(i16)
->
%3:_(i32) = G_ANYEXT %1:_(i16)
%2:_(f16) = G_TRUNC %3:_(i32)
```
https://github.com/llvm/llvm-project/pull/208750
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