[llvm] [SelectionDAG] Add computeKnownBits support for ISD::VECREDUCE_ADD (PR #207631)

[Luke Lau via llvm-commits]

https://github.com/lukel97 requested changes to this pull request.

This PR on its own doesn't improve anything and only introduces regressions on RISC-V, so we should handle computeKnownBits in `RISCVISD::VECREDUCE_ADD_VL` first before returning to this PR

https://github.com/llvm/llvm-project/pull/207631