[llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)

Alexander Coffin via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 18 14:40:48 PDT 2026


GreenBeard wrote:

Would you prefer something like:

```c++
  SDVTList VTs = DAG.getVTList(CmpVT, MVT::i32);

  // If we already have an XOR of the ops, use that to check for equality.
  // Else use SUB instead of CMP to enable CSE between SUB and CMP.
  if (X86CC == X86::COND_E || X86CC == X86::COND_NE) {
    SDNode *IsdNode =
        DAG.getNodeIfExists(ISD::XOR, DAG.getVTList({CmpVT}), {Op0, Op1});
    if (IsdNode == nullptr) {
      IsdNode =
          DAG.getNodeIfExists(ISD::XOR, DAG.getVTList({CmpVT}), {Op1, Op0});
    }
    if (IsdNode != nullptr) {
      SDValue CmpOp = DAG.getNode(X86ISD::XOR, dl, VTs, Op0, Op1);
      DAG.ReplaceAllUsesWith(IsdNode, &CmpOp);
      return CmpOp.getValue(1);
    }
  }

  SDValue CmpOp = DAG.getNode(X86ISD::SUB, dl, VTs, Op0, Op1);
  return CmpOp.getValue(1);
```

This seems a bit worse to me, but if you prefer this I can change it to this.

https://github.com/llvm/llvm-project/pull/210546


More information about the llvm-commits mailing list