[llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)

[via llvm-commits]

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@@ -2175,6 +2175,77 @@ define i16 @blsi16_trunc(i32 %x) {
   ret i16 %and
 }
 
+define i8 @andn8(i8 %x, i8 %y) {
+; X86-LABEL: andn8:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    andnl {{[0-9]+}}(%esp), %eax, %eax
+; X86-NEXT:    # kill: def $al killed $al killed $eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: andn8:
+; X64:       # %bb.0:
+; X64-NEXT:    andnl %esi, %edi, %eax
+; X64-NEXT:    # kill: def $al killed $al killed $eax
+; X64-NEXT:    retq
+;
+; EGPR-LABEL: andn8:
+; EGPR:       # %bb.0:
+; EGPR-NEXT:    andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]
+; EGPR-NEXT:    # kill: def $al killed $al killed $eax
+; EGPR-NEXT:    retq # encoding: [0xc3]
+  %not = xor i8 %x, 255
+  %and = and i8 %not, %y
+  ret i8 %and
+}
+define i8 @andn8_commuted(i8 %x, i8 %y) {
+; X86-LABEL: andn8_commuted:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    andnl {{[0-9]+}}(%esp), %eax, %eax
+; X86-NEXT:    # kill: def $al killed $al killed $eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: andn8_commuted:
+; X64:       # %bb.0:
+; X64-NEXT:    andnl %edi, %esi, %eax
+; X64-NEXT:    # kill: def $al killed $al killed $eax
+; X64-NEXT:    retq
+;
+; EGPR-LABEL: andn8_commuted:
+; EGPR:       # %bb.0:
+; EGPR-NEXT:    andnl %edi, %esi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf2,0xc7]
+; EGPR-NEXT:    # kill: def $al killed $al killed $eax
+; EGPR-NEXT:    retq # encoding: [0xc3]
+  %not = xor i8 %y, 255
+  %and = and i8 %x, %not
+  ret i8 %and
+}
+
+define i8 @and8(i8 %x, i8 %y) {
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mygitljf wrote:

This is a negative control to ensure that, with BMI enabled, a regular i8 AND is not globally promoted by the ANDN combine. I'll add a comment to clarify the intent.

https://github.com/llvm/llvm-project/pull/205050