[llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)

[Gaëtan Bossu via llvm-commits]

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@@ -155,10 +155,130 @@ static void evaluateDeinterleave(IntrinsicInst *I, DeinterleaveMap &Candidates,
   Candidates.try_emplace(I, Extends);
 }
 
+/// Evaluate a reverse intrinsic to see what uses it. We want to find a reverse
+/// that pairs with an extract from a deinterleave, so that we can move the
+/// reverse into the tbl as well as deinterleave and extend. We also need to
+/// confirm that it's only used by single-use instructions, or instructions
+/// used by a phi and a reduction intrinsic outside the loop, where the
+/// reduction permits reassociation. Something like the following:
+///
+///  %acc.b.f64 = phi <vscale x 2 x double> [ splat(double 0.000000e+00),
+///                                          %entry ], [ %fadd.b.f64, %loop ]
+///  ...
+///  %rev.load = load <vscale x 2 x double>, ptr %rev.ptr
+///  %reversed = call <vscale x 2 x double> @llvm.vector.reverse.nxv2f64(
+///                                             <vscale x 2 x double> %rev.load)
+///  %bgra = call <vscale x 8 x i16> @llvm.masked.load(ptr %src.gep,
+///                 <vscale x 8 x i1> %mask, <vscale x 8 x i16> zeroinitializer)
+///  %deinterleave = tail call { <vscale x 2 x i16>, <vscale x 2 x i16>,
+///                               <vscale x 2 x i16>, <vscale x 2 x i16> }
+///                          @llvm.vector.deinterleave4(<vscale x 8 x i16>
+///                          %bgra)
+///  %b.i16 = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i16>,
+///                   <vscale x 2 x i16>, <vscale x 2 x i16> } %deinterleave, 0
+///  %b.f64 = uitofp <vscale x 2 x i16> %b.i16 to <vscale x 2 x double>
+///  %b.mul.f64 = fmul <vscale x 2 x double> %b.f64, %reversed
+///  %fadd.b.f64 = fadd <vscale x 2 x double> %acc.b.f64, %b.mul.f64
+///  %iv.next = add nuw i64 %iv, %stride
+///  %ec = icmp eq i64 %iv.next, 2048
+///  br i1 %ec, label %exit, label %loop
+///  ...
+///  %b.acc = call fast double @llvm.vector.reduce.fadd.nxv2f64(double
+///                             0.000000e+00, <vscale x 2 x double> %fadd.b.f64)
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gbossu wrote:

Could you show the post-optimization IR that is expected after `evaluateReverse` runs? From the description it's not really clear why the reduction is required. Would it be possbile to get an IR->IR test as well instead of an IR->asm test?

https://github.com/llvm/llvm-project/pull/206047